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    Searched refs:mmSDMA0_RLC0_RB_BASE_HI (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c 187 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
amdgpu_amdkfd_gfx_v10.c 485 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
amdgpu_amdkfd_gfx_v7.c 366 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
amdgpu_amdkfd_gfx_v8.c 352 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
amdgpu_amdkfd_gfx_v9.c 473 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 296 #define mmSDMA0_RLC0_RB_BASE_HI 0x0142
sdma0_4_0_offset.h 384 #define mmSDMA0_RLC0_RB_BASE_HI 0x0142
sdma0_4_2_2_offset.h 384 #define mmSDMA0_RLC0_RB_BASE_HI 0x0132
sdma0_4_2_offset.h 380 #define mmSDMA0_RLC0_RB_BASE_HI 0x0142
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h 218 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502
oss_2_0_d.h 272 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502
oss_3_0_1_d.h 257 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502
oss_3_0_d.h 379 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 373 #define mmSDMA0_RLC0_RB_BASE_HI 0x0142
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