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    Searched refs:mmSDMA0_UTCL1_CNTL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 134 #define mmSDMA0_UTCL1_CNTL 0x003c
sdma0_4_0_offset.h 136 #define mmSDMA0_UTCL1_CNTL 0x003c
sdma0_4_2_2_offset.h 136 #define mmSDMA0_UTCL1_CNTL 0x003c
sdma0_4_2_offset.h 136 #define mmSDMA0_UTCL1_CNTL 0x003c
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v5_0.c 718 temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL));
721 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 108 #define mmSDMA0_UTCL1_CNTL 0x003c
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