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    Searched refs:mmSDMA0_UTCL1_PAGE (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 158 #define mmSDMA0_UTCL1_PAGE 0x0048
sdma0_4_0_offset.h 160 #define mmSDMA0_UTCL1_PAGE 0x0048
sdma0_4_2_2_offset.h 160 #define mmSDMA0_UTCL1_PAGE 0x0048
sdma0_4_2_offset.h 160 #define mmSDMA0_UTCL1_PAGE 0x0048
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v5_0.c 83 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x00ffffff, 0x000c5c00),
724 temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE));
728 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp);
amdgpu_sdma_v4_0.c 106 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
148 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
183 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
264 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 132 #define mmSDMA0_UTCL1_PAGE 0x0048
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