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    Searched refs:mmSDMA1_GFX_IB_CNTL (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mxgpu_vi.c 115 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
255 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
amdgpu_sdma_v3_0.c 95 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
113 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
133 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
147 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
162 mmSDMA1_GFX_IB_CNTL, 0x00000100, 0x00000100,
amdgpu_sdma_v4_0.c 109 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h 308 #define mmSDMA1_GFX_IB_CNTL 0x368a
oss_2_0_d.h 349 #define mmSDMA1_GFX_IB_CNTL 0x368a
oss_3_0_1_d.h 397 #define mmSDMA1_GFX_IB_CNTL 0x368a
oss_3_0_d.h 501 #define mmSDMA1_GFX_IB_CNTL 0x368a
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_offset.h 222 #define mmSDMA1_GFX_IB_CNTL 0x008a
sdma1_4_2_2_offset.h 222 #define mmSDMA1_GFX_IB_CNTL 0x008a
sdma1_4_2_offset.h 218 #define mmSDMA1_GFX_IB_CNTL 0x008a
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 1220 #define mmSDMA1_GFX_IB_CNTL 0x068a
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