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    Searched refs:mmSDMA1_GFX_RB_WPTR_HI (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_offset.h 214 #define mmSDMA1_GFX_RB_WPTR_HI 0x0086
sdma1_4_2_2_offset.h 214 #define mmSDMA1_GFX_RB_WPTR_HI 0x0086
sdma1_4_2_offset.h 210 #define mmSDMA1_GFX_RB_WPTR_HI 0x0086
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 1212 #define mmSDMA1_GFX_RB_WPTR_HI 0x0686
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