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Searched refs:mmSDMA1_RLC0_RB_CNTL (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c	`94 mmSDMA1_RLC0_RB_CNTL) - mmSDMA1_RLC0_RB_CNTL;`
amdgpu_amdkfd_gfx_v9.c	`231 mmSDMA1_RLC0_RB_CNTL) - mmSDMA1_RLC0_RB_CNTL`
amdgpu_amdkfd_gfx_v10.c	`223 * instead of mmSDMA1_RLC0_RB_CNTL for the base address calc 227 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h	`325 #define mmSDMA1_RLC0_RB_CNTL 0x3700`
oss_2_0_d.h	`361 #define mmSDMA1_RLC0_RB_CNTL 0x3700`
oss_3_0_1_d.h	`426 #define mmSDMA1_RLC0_RB_CNTL 0x3700`
oss_3_0_d.h	`527 #define mmSDMA1_RLC0_RB_CNTL 0x3700`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_offset.h	`372 #define mmSDMA1_RLC0_RB_CNTL 0x0140`
sdma1_4_2_2_offset.h	`372 #define mmSDMA1_RLC0_RB_CNTL 0x0130`
sdma1_4_2_offset.h	`368 #define mmSDMA1_RLC0_RB_CNTL 0x0140`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`1368 #define mmSDMA1_RLC0_RB_CNTL 0x0740 [all...]`

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