HomeSort by: relevance | last modified time | path
    Searched refs:mmSDMA1_RLC5_RB_WPTR_POLL_CNTL (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_2_2_offset.h 806 #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x02ef
sdma1_4_2_offset.h 802 #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x0327
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v5_0.c 92 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
amdgpu_sdma_v4_0.c 207 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 1797 #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x0927
    [all...]

Completed in 109 milliseconds