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    Searched refs:mmSDMA1_UTCL1_WR_STATUS_DEFAULT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_default.h	80 #define mmSDMA1_UTCL1_WR_STATUS_DEFAULT 0x503001ff
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_default.h	564 #define mmSDMA1_UTCL1_WR_STATUS_DEFAULT 0x51011555

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