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    Searched refs:mmSEM_EDC_CONFIG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
osssys_4_0_1_offset.h 330 #define mmSEM_EDC_CONFIG 0x01b3
osssys_4_0_offset.h 320 #define mmSEM_EDC_CONFIG 0x01b3
osssys_5_0_0_offset.h 346 #define mmSEM_EDC_CONFIG 0x01b3
oss_2_4_d.h 73 #define mmSEM_EDC_CONFIG 0xf9a
oss_2_0_d.h 68 #define mmSEM_EDC_CONFIG 0xf9a
oss_3_0_1_d.h 71 #define mmSEM_EDC_CONFIG 0xf9a
oss_3_0_d.h 83 #define mmSEM_EDC_CONFIG 0xf9a

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