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Searched refs:mmSMC_MSG_ARG_0 (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_smc.c	`77 WREG32(mmSMC_MSG_ARG_0, parameter);`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_thermal.c	`159 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_FUZZY); 172 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_TABLE);`
amdgpu_smu7_hwmgr.c	`3507 tmp = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); 3546 sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); 3552 mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); 4466 clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); 4482 clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_smu7_smumgr.c	`210 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); 217 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); 224 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);`
amdgpu_fiji_smumgr.c	`145 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);`
amdgpu_ci_smumgr.c	`233 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_d.h	`108 #define mmSMC_MSG_ARG_0 0xa4`
smu_7_0_1_d.h	`110 #define mmSMC_MSG_ARG_0 0xa4`
smu_7_1_0_d.h	`109 #define mmSMC_MSG_ARG_0 0xa4`
smu_7_1_1_d.h	`109 #define mmSMC_MSG_ARG_0 0xa4`
smu_7_1_2_d.h	`112 #define mmSMC_MSG_ARG_0 0xa4`
smu_7_1_3_d.h	`115 #define mmSMC_MSG_ARG_0 0xa4`

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