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Searched refs:mmSMC_RESP_0 (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_smc.c	`45 if ((RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK) != 0) 49 tmp = RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK;`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_6_0_d.h	`146 #define mmSMC_RESP_0 0x008C`
smu_7_0_0_d.h	`93 #define mmSMC_RESP_0 0x95`
smu_7_0_1_d.h	`95 #define mmSMC_RESP_0 0x95`
smu_7_1_0_d.h	`94 #define mmSMC_RESP_0 0x95`
smu_7_1_1_d.h	`94 #define mmSMC_RESP_0 0x95`
smu_7_1_2_d.h	`97 #define mmSMC_RESP_0 0x95`
smu_7_1_3_d.h	`100 #define mmSMC_RESP_0 0x95`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_smu7_smumgr.c	`184 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);`
amdgpu_ci_smumgr.c	`217 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);`

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