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Searched refs:mmSPI_CDBG_SYS_CS0 (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h	`1410 #define mmSPI_CDBG_SYS_CS0 0x31c5`
gfx_7_2_d.h	`1427 #define mmSPI_CDBG_SYS_CS0 0x31c5`
gfx_8_0_d.h	`1606 #define mmSPI_CDBG_SYS_CS0 0x31c5`
gfx_8_1_d.h	`1574 #define mmSPI_CDBG_SYS_CS0 0x31c5`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2688 #define mmSPI_CDBG_SYS_CS0 0x11c5`
gc_9_2_1_offset.h	`2874 #define mmSPI_CDBG_SYS_CS0 0x11c5`

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