HomeSort by: relevance | last modified time | path
    Searched refs:mmSPI_GDBG_WAVE_CNTL2 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2718 #define mmSPI_GDBG_WAVE_CNTL2 0x11d4
gc_9_2_1_offset.h 2904 #define mmSPI_GDBG_WAVE_CNTL2 0x11d4

Completed in 54 milliseconds