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Searched refs:mmSPI_PS_INPUT_CNTL_5 (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`1249 #define mmSPI_PS_INPUT_CNTL_5 0xA196`
gfx_7_0_d.h	`1368 #define mmSPI_PS_INPUT_CNTL_5 0xa196`
gfx_7_2_d.h	`1385 #define mmSPI_PS_INPUT_CNTL_5 0xa196`
gfx_8_0_d.h	`1564 #define mmSPI_PS_INPUT_CNTL_5 0xa196`
gfx_8_1_d.h	`1532 #define mmSPI_PS_INPUT_CNTL_5 0xa196`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`3868 #define mmSPI_PS_INPUT_CNTL_5 0x0196`
gc_9_1_offset.h	`4098 #define mmSPI_PS_INPUT_CNTL_5 0x0196`
gc_9_2_1_offset.h	`4050 #define mmSPI_PS_INPUT_CNTL_5 0x0196`
gc_10_1_0_offset.h	`6252 #define mmSPI_PS_INPUT_CNTL_5 0x0196 [all...]`

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