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Searched refs:mmSQ_EDC_SEC_CNT (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_4_1_offset.h	`164 #define mmSQ_EDC_SEC_CNT 0x03a3`
gc_9_0_offset.h	`560 #define mmSQ_EDC_SEC_CNT 0x03a3`
gc_9_1_offset.h	`554 #define mmSQ_EDC_SEC_CNT 0x03a3`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_4.c	`68 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 4, 16 },`
amdgpu_gfx_v8_0.c	`1515 mmSQ_EDC_SEC_CNT,`
amdgpu_gfx_v9_0.c	`4133 { SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 4, 16},`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`2099 #define mmSQ_EDC_SEC_CNT 0x23a1`
gfx_8_1_d.h	`2067 #define mmSQ_EDC_SEC_CNT 0x23a1`

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