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    Searched refs:mmTCC_CTRL (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mxgpu_vi.c 260 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
amdgpu_gfx_v8_0.c 216 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
329 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
360 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
392 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
433 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
491 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
588 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
693 mmTCC_CTRL, 0x00100000, 0xf31fff7f,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 1602 #define mmTCC_CTRL 0x2B80
gfx_7_0_d.h 2022 #define mmTCC_CTRL 0x2b80
gfx_7_2_d.h 2043 #define mmTCC_CTRL 0x2b80
gfx_8_0_d.h 2247 #define mmTCC_CTRL 0x2b80
gfx_8_1_d.h 2226 #define mmTCC_CTRL 0x2b80
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
polaris10_pwrvirus.h 57 { 0xf30fff0f, mmTCC_CTRL },
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 1749 #define mmTCC_CTRL 0x0b80
gc_9_1_offset.h 2034 #define mmTCC_CTRL 0x0b80
gc_9_2_1_offset.h 1974 #define mmTCC_CTRL 0x0b80

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