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    Searched refs:mmUMCCH0_0_EccErrCntSel (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/umc/
umc_6_1_1_offset.h	26 #define mmUMCCH0_0_EccErrCntSel 0x0360
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_umc_v6_1.c	113 SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel); 327 SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel);

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Indexes created Wed Oct 22 13:09:56 GMT 2025