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    Searched refs:mmUVD_CTX_DATA (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_d.h 41 #define mmUVD_CTX_DATA 0x3D29
uvd_4_2_d.h 43 #define mmUVD_CTX_DATA 0x3d29
uvd_5_0_d.h 49 #define mmUVD_CTX_DATA 0x3d29
uvd_6_0_d.h 65 #define mmUVD_CTX_DATA 0x3d29
uvd_7_0_offset.h 144 #define mmUVD_CTX_DATA 0x0529
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 304 #define mmUVD_CTX_DATA 0x0529
vcn_2_0_0_offset.h 504 #define mmUVD_CTX_DATA 0x01e9
vcn_2_5_offset.h 607 #define mmUVD_CTX_DATA 0x00c8
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_soc15.c 181 data = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_DATA);
195 data = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_DATA);
amdgpu_vi.c 172 r = RREG32(mmUVD_CTX_DATA);
183 WREG32(mmUVD_CTX_DATA, (v));
amdgpu_cik.c 137 r = RREG32(mmUVD_CTX_DATA);
148 WREG32(mmUVD_CTX_DATA, (v));

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