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Searched refs:mmUVD_DPG_LMA_MASK_BASE_IDX (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h	`43 #define mmUVD_DPG_LMA_MASK_BASE_IDX 1`
vcn_2_0_0_offset.h	`401 #define mmUVD_DPG_LMA_MASK_BASE_IDX 1`
vcn_2_5_offset.h	`416 #define mmUVD_DPG_LMA_MASK_BASE_IDX 1`

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