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    Searched refs:mmUVD_RB_ARB_CTRL (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v2_5.c 837 UVD, 0, mmUVD_RB_ARB_CTRL), 0, 0, indirect);
984 WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_RB_ARB_CTRL), 0,
1339 WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_RB_ARB_CTRL),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_2_0_0_offset.h 490 #define mmUVD_RB_ARB_CTRL 0x01e0
vcn_2_5_offset.h 603 #define mmUVD_RB_ARB_CTRL 0x00c6

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