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    Searched refs:mmVCE_LMI_CACHE_CTRL (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h 30 #define mmVCE_LMI_CACHE_CTRL 0x83BD
vce_2_0_d.h 68 #define mmVCE_LMI_CACHE_CTRL 0x853d
vce_3_0_d.h 73 #define mmVCE_LMI_CACHE_CTRL 0x85bd
vce_4_0_offset.h 146 #define mmVCE_LMI_CACHE_CTRL 0x0fec
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c 183 WREG32_P(mmVCE_LMI_CACHE_CTRL, 0x0, ~0x1);
amdgpu_vce_v4_0.c 249 MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_CACHE_CTRL), ~0x1, 0);
620 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_CACHE_CTRL), 0x0, ~0x1);
amdgpu_vce_v3_0.c 539 WREG32_P(mmVCE_LMI_CACHE_CTRL, 0x0, ~0x1);

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