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Searched refs:mmVCE_LMI_SWAP_CNTL1 (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`36 #define mmVCE_LMI_SWAP_CNTL1 0x83AE`
vce_2_0_d.h	`65 #define mmVCE_LMI_SWAP_CNTL1 0x852e`
vce_3_0_d.h	`70 #define mmVCE_LMI_SWAP_CNTL1 0x85ae`
vce_4_0_offset.h	`142 #define mmVCE_LMI_SWAP_CNTL1 0x0fde`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c	`185 WREG32(mmVCE_LMI_SWAP_CNTL1, 0);`
amdgpu_vce_v4_0.c	`251 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL1), 0); 622 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL1), 0);`
amdgpu_vce_v3_0.c	`541 WREG32(mmVCE_LMI_SWAP_CNTL1, 0);`

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