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    Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h 37 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8397
vce_2_0_d.h 58 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8517
vce_3_0_d.h 63 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8597
vce_4_0_offset.h 128 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x0fcc
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c 188 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8));
amdgpu_vce_v3_0.c 550 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8));

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