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    Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_4_0_offset.h 166 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x1097
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v3_0.c 54 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617
547 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8));
amdgpu_vce_v4_0.c 278 mmVCE_LMI_VCPU_CACHE_40BIT_BAR1),
646 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8));

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