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Searched refs:mmVCE_RB_WPTR (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`48 #define mmVCE_RB_WPTR 0x8064`
vce_2_0_d.h	`47 #define mmVCE_RB_WPTR 0x8064`
vce_3_0_d.h	`47 #define mmVCE_RB_WPTR 0x8064`
vce_4_0_offset.h	`90 #define mmVCE_RB_WPTR 0x0a64`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c	`82 return RREG32(mmVCE_RB_WPTR); 99 WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr)); 250 WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));`
amdgpu_vce_v3_0.c	`127 v = RREG32(mmVCE_RB_WPTR); 158 WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr)); 287 WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));`
amdgpu_vce_v4_0.c	`95 return RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR)); 121 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR), 350 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR), lower_32_bits(ring->wptr));`

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