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Searched refs:mmVCE_RB_WPTR2 (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`49 #define mmVCE_RB_WPTR2 0x805F`
vce_2_0_d.h	`42 #define mmVCE_RB_WPTR2 0x805f`
vce_3_0_d.h	`42 #define mmVCE_RB_WPTR2 0x805f`
vce_4_0_offset.h	`80 #define mmVCE_RB_WPTR2 0x0a5f`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c	`84 return RREG32(mmVCE_RB_WPTR2); 101 WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr)); 257 WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));`
amdgpu_vce_v3_0.c	`129 v = RREG32(mmVCE_RB_WPTR2); 160 WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr)); 294 WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));`
amdgpu_vce_v4_0.c	`97 return RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR2)); 124 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR2), 358 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR2), lower_32_bits(ring->wptr));`

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