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Searched refs:mmVCE_SYS_INT_EN (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`53 #define mmVCE_SYS_INT_EN 0x8340`
vce_2_0_d.h	`55 #define mmVCE_SYS_INT_EN 0x84c0`
vce_3_0_d.h	`60 #define mmVCE_SYS_INT_EN 0x8540`
vce_4_0_offset.h	`108 #define mmVCE_SYS_INT_EN 0x0b00`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v4_0.c	`306 MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), 661 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), 1027 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), val,`
amdgpu_vce_v2_0.c	`532 WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);`
amdgpu_vce_v3_0.c	`716 WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);`

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