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Searched refs:mmVCE_VCPU_CACHE_SIZE0 (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`61 #define mmVCE_VCPU_CACHE_SIZE0 0x800A`
vce_2_0_d.h	`32 #define mmVCE_VCPU_CACHE_SIZE0 0x800a`
vce_3_0_d.h	`32 #define mmVCE_VCPU_CACHE_SIZE0 0x800a`
vce_4_0_offset.h	`36 #define mmVCE_VCPU_CACHE_SIZE0 0x0a0a`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c	`193 WREG32(mmVCE_VCPU_CACHE_SIZE0, size);`
amdgpu_vce_v4_0.c	`291 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE0), size); 644 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE0), size);`
amdgpu_vce_v3_0.c	`554 WREG32(mmVCE_VCPU_CACHE_SIZE0, size);`

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