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    Searched refs:mmVM_L2_CACHE_PARITY_CNTL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_1_0_offset.h 1318 #define mmVM_L2_CACHE_PARITY_CNTL 0x069b
mmhub_9_1_offset.h 1350 #define mmVM_L2_CACHE_PARITY_CNTL 0x069b
mmhub_9_3_0_offset.h 1334 #define mmVM_L2_CACHE_PARITY_CNTL 0x069b
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 1214 #define mmVM_L2_CACHE_PARITY_CNTL 0x085b
gc_9_1_offset.h 1240 #define mmVM_L2_CACHE_PARITY_CNTL 0x085b
gc_9_2_1_offset.h 1178 #define mmVM_L2_CACHE_PARITY_CNTL 0x085b

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