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  /src/external/mit/xorg/lib/pixman/
Makefile 54 SRCS+= pixman-mmx.c
55 COPTS.pixman-mmx.c= -mmmx -fvisibility=hidden
57 COPTS.pixman-mmx.c+= -Wno-error=attributes
86 #SRCS+= pixman-mmx.c
87 #COPTS.pixman-mmx.c= -mcpu=iwmmxt
101 SRCS+= pixman-mmx.c
104 COPTS.pixman-mmx.c= -march=loongson2f -mhard-float -Wa,-mhard-float
  /src/sys/arch/amd64/stand/prekern/
Makefile 28 CFLAGS+= -mno-red-zone -mno-mmx -mno-sse -mno-avx -ffreestanding
  /src/external/apache2/llvm/dist/clang/lib/Headers/
module.modulemap 81 explicit module mmx {
87 export mmx
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium/mmx/
rshift.asm 44 C It takes 6 mmx instructions to process 2 limbs, making 1.5 cycles/limb,
47 C Full speed depends on source and destination being aligned. Unaligned mmx
51 C MMX shifts work out a bit faster even for the simple loop.
121 C cycles and would be 8 in a simple loop. Using mmx helps the return value
266 C - mmx loads and stores execute only in the U pipe
267 C - only one mmx shift in a pair
268 C - wait one cycle before storing an mmx register result
hamdist.asm 40 include_mpn(`x86/k6/mmx/popham.asm')
mul_1.asm 1 dnl Intel Pentium MMX mpn_mul_1 -- mpn by limb multiplication.
42 C When the multiplier is 16 bits some special case MMX code is used. Small
51 C MMX is not believed to be of any use for 32-bit multipliers, since for
57 C Adding the high and low MMX products using integer code seems best. An
203 C cycles faster, so there's no threshold as such, just use the MMX
225 C the same 13 cycles as an mmx block would be.
348 C the same speed as another mmx block would be.
  /src/external/lgpl3/gmp/dist/mpn/x86/atom/mmx/
copyd.asm 34 include_mpn(`x86/k7/mmx/copyd.asm')
copyi.asm 34 include_mpn(`x86/k7/mmx/copyi.asm')
hamdist.asm 34 include_mpn(`x86/k7/mmx/popham.asm')
  /src/external/lgpl3/gmp/dist/mpn/x86/p6/mmx/
lshift.asm 38 include_mpn(`x86/pentium/mmx/lshift.asm')
popham.asm 39 include_mpn(`x86/k6/mmx/popham.asm')
rshift.asm 38 include_mpn(`x86/pentium/mmx/rshift.asm')
  /src/external/lgpl3/gmp/dist/mpn/x86/p6/p3mmx/
popham.asm 42 include_mpn(`x86/k7/mmx/popham.asm')
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium4/mmx/
lshift.asm 39 include_mpn(`x86/pentium/mmx/lshift.asm')
rshift.asm 39 include_mpn(`x86/pentium/mmx/rshift.asm')
popham.asm 51 C For popcount there's 13 mmx instructions in the loop, so perhaps 6.5 c/l
  /src/external/gpl3/gcc.old/dist/gcc/d/dmd/
target.h 31 mmx, member in class:CPU
target.d 33 mmx,
  /src/external/lgpl3/gmp/dist/mpn/x86/k6/mmx/
lshift.asm 40 C The loop runs at 3 cycles/limb, limited by decoding and by having 3 mmx
rshift.asm 40 C The loop runs at 3 cycles/limb, limited by decoding and by having 3 mmx
  /src/external/bsd/zstd/dist/lib/common/
cpu.h 205 D(mmx, 23)
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium4/sse2/
rsh1add_n.asm 47 C plus psrlq to move the new carry down. That, and just 4 mmx instructions
  /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/
cpuid.d 71 // PMMX -- + mmx()
73 // PII -- + mmx()
74 // PIII -- + mmx() + sse()
75 // PentiumM -- + mmx() + sse() + sse2()
80 // AMD K6 -- + mmx()
81 // AMD K6-II -- + mmx() + 3dnow()
86 // 6x86MX -- + mmx()
135 /// Is MMX supported?
136 bool mmx() {return _mmx;}
181 /// Are AMD extensions to MMX supported
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium/
mode1o.asm 50 C Using mmx for the multiplies might be possible, with pmullw and pmulhw
  /src/external/gpl3/binutils/dist/zlib/contrib/masmx86/
inffas32.asm 15 ; * compiled with gcc -DNO_MMX, but inffast.S is still faster on the P3 with MMX
16 ; * enabled. I will attempt to merge the MMX code into this version. Newer
65 .mmx

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