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    Searched refs:modesIndex (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/external/isc/atheros_hal/dist/ar5416/
ar9285_attach.c 294 u_int modesIndex;
300 modesIndex = 3;
302 modesIndex = 5;
304 modesIndex = 4;
310 modesIndex, regWrites);
313 modesIndex, regWrites);
ar9280_attach.c 309 u_int modesIndex;
316 modesIndex = 3;
318 modesIndex = 5;
320 modesIndex = 4;
324 modesIndex = 2;
326 modesIndex = 1;
336 modesIndex, regWrites);
339 modesIndex, regWrites);
341 modesIndex, regWrites);
350 modesIndex, regWrites)
    [all...]
ar5416_attach.c 416 u_int modesIndex, freqIndex;
424 modesIndex = 3;
426 modesIndex = 5;
428 modesIndex = 4;
433 modesIndex = 2;
435 modesIndex = 1;
454 modesIndex, regWrites);
459 AH5212(ah)->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
ar2133.c 59 ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
173 uint16_t modesIndex, uint16_t *rfXpdGain)
190 ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
193 ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
ar9280.c 46 ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
159 uint16_t modesIndex, uint16_t *rfXpdGain)
  /src/sys/external/isc/atheros_hal/dist/ar5312/
ar5312_reset.c 95 u_int modesIndex, freqIndex;
222 modesIndex = 1;
226 modesIndex = 2;
230 modesIndex = 3;
234 modesIndex = 4;
238 modesIndex = 5;
252 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
255 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
344 if (!ahp->ah_rfHal->setRfRegs(ah, ichan, modesIndex, rfXpdGain)) {
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5111.c 63 ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
66 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes);
218 uint16_t modesIndex, uint16_t *rfXpdGain)
287 rfReg[i] = ar5212Bank0_5111[i][modesIndex];
298 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites);
301 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites);
305 rfReg[i] = ar5212Bank6_5111[i][modesIndex];
319 rfReg[i] = ar5212Bank7_5111[i][modesIndex];
ar2316.c 68 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
164 ar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
178 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
179 __func__, chan->channel, chan->channelFlags, modesIndex);
204 RF_BANK_SETUP(priv, 2, modesIndex);
207 RF_BANK_SETUP(priv, 3, modesIndex);
210 RF_BANK_SETUP(priv, 6, modesIndex);
216 RF_BANK_SETUP(priv, 7, modesIndex);
ar2317.c 69 ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
72 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
142 ar2317SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
156 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
157 __func__, chan->channel, chan->channelFlags, modesIndex);
182 RF_BANK_SETUP(priv, 2, modesIndex);
185 RF_BANK_SETUP(priv, 3, modesIndex);
188 RF_BANK_SETUP(priv, 6, modesIndex);
194 RF_BANK_SETUP(priv, 7, modesIndex);
ar2413.c 64 ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);
158 ar2413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
172 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
173 __func__, chan->channel, chan->channelFlags, modesIndex);
198 RF_BANK_SETUP(priv, 2, modesIndex);
201 RF_BANK_SETUP(priv, 3, modesIndex);
204 RF_BANK_SETUP(priv, 6, modesIndex);
210 RF_BANK_SETUP(priv, 7, modesIndex);
ar2425.c 52 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
55 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
152 ar2425SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
166 "==>%s:chan 0x%x flag 0x%x modesIndex 0x%x\n",
167 __func__, chan->channel, chan->channelFlags, modesIndex);
192 RF_BANK_SETUP(priv, 2, modesIndex);
195 RF_BANK_SETUP(priv, 3, modesIndex);
198 RF_BANK_SETUP(priv, 6, modesIndex);
204 RF_BANK_SETUP(priv, 7, modesIndex);
ar5413.c 64 ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
157 ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
172 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
173 __func__, chan->channel, chan->channelFlags, modesIndex);
216 RF_BANK_SETUP(priv, 2, modesIndex);
219 RF_BANK_SETUP(priv, 3, modesIndex);
222 RF_BANK_SETUP(priv, 6, modesIndex);
245 RF_BANK_SETUP(priv, 7, modesIndex);
ar5112.c 64 ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5112, modesIndex, writes);
179 uint16_t modesIndex, uint16_t *rfXpdGain)
242 RF_BANK_SETUP(priv, 2, modesIndex);
245 RF_BANK_SETUP(priv, 3, modesIndex);
248 RF_BANK_SETUP(priv, 6, modesIndex);
298 RF_BANK_SETUP(priv, 7, modesIndex);
ar5212_reset.c 112 u_int modesIndex, freqIndex;
263 modesIndex = 1;
267 modesIndex = 2;
271 modesIndex = 3;
275 modesIndex = 4;
279 modesIndex = 5;
293 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
296 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
384 if (!ahp->ah_rfHal->setRfRegs(ah, ichan, modesIndex, rfXpdGain)) {
ar5212.h 140 HAL_CHANNEL_INTERNAL *, uint16_t modesIndex,
  /src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211_reset.c 163 uint16_t modesIndex = 0, freqIndex = 0;
270 modesIndex = 1;
274 modesIndex = 2;
278 modesIndex = 3;
282 modesIndex = 4;
332 OS_REG_WRITE(ah, ar5211Modes[i][0], ar5211Modes[i][modesIndex]);

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