| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 138 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
374 MRQ_EXPANSION_MODE, &rq_regs.mrq_expansion_mode,
401 DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
403 if (rq_regs.mrq_expansion_mode != dml_rq_regs->mrq_expansion_mode)
405 dml_rq_regs->mrq_expansion_mode, rq_regs.mrq_expansion_mode);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 193 dml_print("DML_RQ_DLG_CALC: mrq_expansion_mode = 0x%0x\n", rq_regs.mrq_expansion_mode);
|
| display_mode_structs.h | 510 unsigned int mrq_expansion_mode; member in struct:_vcs_dpi_display_rq_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 260 rq_regs->mrq_expansion_mode = 1;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 208 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
1063 MRQ_EXPANSION_MODE, &rq_regs->mrq_expansion_mode,
1273 MRQ_EXPANSION_MODE, &rq_regs.mrq_expansion_mode,
1301 DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
1303 if (rq_regs.mrq_expansion_mode != dml_rq_regs->mrq_expansion_mode)
1305 dml_rq_regs->mrq_expansion_mode, rq_regs.mrq_expansion_mode)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 217 pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
|
| amdgpu_dcn10_hubp.c | 556 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
871 MRQ_EXPANSION_MODE, &rq_regs->mrq_expansion_mode,
|
| amdgpu_dcn10_hw_sequencer.c | 205 pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 223 rq_regs->mrq_expansion_mode = 1;
|
| amdgpu_display_rq_dlg_calc_20v2.c | 223 rq_regs->mrq_expansion_mode = 1;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 203 rq_regs->mrq_expansion_mode = 1;
|
