| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/loongson/ |
| loongson64c_4core_ls7a.dts | 28 msi: msi-controller@2ff00000 { label
29 compatible = "loongson,pch-msi-1.0";
32 msi-controller;
33 loongson,msi-base-vec = <64>;
34 loongson,msi-num-vecs = <64>;
|
| loongson64g_4core_ls7a.dts | 32 msi: msi-controller@2ff00000 { label
33 compatible = "loongson,pch-msi-1.0";
36 msi-controller;
37 loongson,msi-base-vec = <64>;
38 loongson,msi-num-vecs = <192>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| foundation-v8-gicv3.dtsi | 22 its: msi-controller@2f020000 {
24 msi-controller;
25 #msi-cells = <1>;
|
| fvp-base-revc.dts | 129 its: msi-controller@2f020000 {
130 #msi-cells = <1>;
133 msi-controller;
169 msi-map = <0x0 &its 0x0 0x10000>;
185 msi-parent = <&its 0x10000>;
|
| /src/sys/arch/arm/pci/ |
| pci_msi_machdep.c | 85 struct arm_pci_msi *msi; local in function:arm_pci_msi_alloc_common
90 msi = arm_pci_msi_lookup(pa);
91 if (msi == NULL || msi->msi_alloc == NULL)
94 vectors = msi->msi_alloc(msi, count, pa, exact);
107 struct arm_pci_msi *msi; local in function:arm_pci_msix_alloc_common
112 msi = arm_pci_msi_lookup(pa);
113 if (msi == NULL || msi->msix_alloc == NULL
141 struct arm_pci_msi *msi; local in function:arm_pci_msi_intr_establish
260 struct arm_pci_msi *msi = NULL; local in function:pci_intr_release
[all...] |
| /src/sys/arch/arm/apple/ |
| apple_pcie.c | 403 int msi, n; local in function:apple_pcie_msi_alloc_msi
405 for (msi = 0; msi < sc->sc_nmsi; msi += n) {
407 if (sc->sc_msi_pa[msi] != NULL) {
414 for (n = 1; n < count && msi + n < sc->sc_nmsi; n++) {
415 if (sc->sc_msi_pa[msi + n] != NULL) {
428 sc->sc_msi_pa[msi + n] = new_pa;
431 return msi;
438 apple_pcie_msi_free_msi(struct apple_pcie_softc *sc, int msi)
453 int msi, n; local in function:apple_pcie_msi_available_msi
720 struct arm_pci_msi *msi = &sc->sc_msi; local in function:apple_pcie_msi_init
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pci/ |
| nouveau_nvkm_subdev_pci_base.c | 86 if (pci->msi)
138 "couldn't allocate MSI (%s)\n", name);
200 /* Ensure MSI interrupts are armed, for the case where there are
203 if (pci->msi)
237 if (pci->msi)
279 case 0x84: /* G84, no mode switch with MSI */
284 pci->msi = true;
290 pci->msi = false;
293 pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi);
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/northstar2/ |
| ns2.dtsi | 142 msi-parent = <&v2m0>;
173 msi-parent = <&v2m0>;
191 msi-parent = <&v2m0>;
373 msi-controller;
375 arm,msi-base-spi = <72>;
376 arm,msi-num-spis = <16>;
382 msi-controller;
384 arm,msi-base-spi = <88>;
385 arm,msi-num-spis = <16>;
391 msi-controller
[all...] |
| /src/sys/arch/arm/cortex/ |
| gic_v2m.c | 131 panic("gic_v2m_msi_enable: device is not MSI-capable");
171 panic("gic_v2m_msi_disable: device is not MSI-capable");
190 panic("gic_v2m_msix_enable: device is not MSI-X-capable");
221 panic("gic_v2m_msix_disable: device is not MSI-X-capable");
229 gic_v2m_msi_alloc(struct arm_pci_msi *msi, int *count,
232 struct gic_v2m_frame * const frame = msi->msi_priv;
259 __SHIFTIN(msi->msi_id, ARM_PCI_INTR_FRAME);
268 gic_v2m_msix_alloc(struct arm_pci_msi *msi, u_int *table_indexes, int *count,
271 struct gic_v2m_frame * const frame = msi->msi_priv;
320 __SHIFTIN(msi->msi_id, ARM_PCI_INTR_FRAME)
367 struct arm_pci_msi *msi = &frame->frame_msi; local in function:gic_v2m_init
[all...] |
| gicv3_its.c | 485 panic("gicv3_its_msi_enable: device is not MSI-capable");
522 panic("gicv3_its_msi_enable: device is not MSI-capable");
541 panic("gicv3_its_msix_enable: device is not MSI-X-capable");
567 panic("gicv3_its_msix_disable: device is not MSI-X-capable");
575 gicv3_its_msi_alloc(struct arm_pci_msi *msi, int *count,
578 struct gicv3_its * const its = msi->msi_priv;
604 __SHIFTIN(msi->msi_id, ARM_PCI_INTR_FRAME);
633 gicv3_its_msix_alloc(struct arm_pci_msi *msi, u_int *table_indexes, int *count,
636 struct gicv3_its * const its = msi->msi_priv;
683 __SHIFTIN(msi->msi_id, ARM_PCI_INTR_FRAME)
1065 struct arm_pci_msi *msi; local in function:gicv3_its_init
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/ |
| armada-ap80x.dtsi | 92 msi-controller;
94 arm,msi-base-spi = <160>;
95 arm,msi-num-spis = <32>;
99 msi-controller;
101 arm,msi-base-spi = <192>;
102 arm,msi-num-spis = <32>;
106 msi-controller;
108 arm,msi-base-spi = <224>;
109 arm,msi-num-spis = <32>;
113 msi-controller
[all...] |
| armada-ap810-ap0.dtsi | 59 msi-controller;
60 #msi-cells = <1>;
77 msi-parent = <&gic_its_ap0 0xa0>;
85 msi-parent = <&gic_its_ap0 0xa1>;
93 msi-parent = <&gic_its_ap0 0xa2>;
101 msi-parent = <&gic_its_ap0 0xa3>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amd/ |
| amd-overdrive.dts | 64 arm,msi-base-spi = <64>;
65 arm,msi-num-spis = <256>;
|
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/microchip/ |
| mpfs-m100pfs-fabric.dtsi | 36 msi-parent = <&pcie>;
37 msi-controller;
|
| mpfs-polarberry-fabric.dtsi | 36 msi-parent = <&pcie>;
37 msi-controller;
|
| mpfs-icicle-kit-fabric.dtsi | 49 msi-parent = <&pcie>;
50 msi-controller;
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| alpine.dtsi | 164 msi-parent = <&msix>;
171 msi-controller;
172 al,msi-base-spi = <96>;
173 al,msi-num-spis = <64>;
|
| bcm-hr2.dtsi | 320 msi-parent = <&msi0>;
321 msi0: msi-controller {
322 compatible = "brcm,iproc-msi";
323 msi-controller;
329 brcm,pcie-msi-inten;
356 msi-parent = <&msi1>;
357 msi1: msi-controller {
358 compatible = "brcm,iproc-msi";
359 msi-controller;
365 brcm,pcie-msi-inten
[all...] |
| bcm-nsp.dtsi | 557 msi-parent = <&msi0>;
558 msi0: msi-controller {
559 compatible = "brcm,iproc-msi";
560 msi-controller;
566 brcm,pcie-msi-inten;
594 msi-parent = <&msi1>;
595 msi1: msi-controller {
596 compatible = "brcm,iproc-msi";
597 msi-controller;
603 brcm,pcie-msi-inten
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amazon/ |
| alpine-v2.dtsi | 142 msi-parent = <&msix>;
149 msi-controller;
150 al,msi-base-spi = <160>;
151 al,msi-num-spis = <160>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/hisilicon/ |
| hip05.dtsi | 245 its_peri: msi-controller@8c000000 {
247 msi-controller;
248 #msi-cells = <1>;
252 its_m3: msi-controller@a3000000 {
254 msi-controller;
255 #msi-cells = <1>;
259 its_pcie: msi-controller@b7000000 {
261 msi-controller;
262 #msi-cells = <1>;
266 its_dsa: msi-controller@c6000000
[all...] |
| hip07.dtsi | 927 p0_its_peri_a: msi-controller@4c000000 {
929 msi-controller;
930 #msi-cells = <1>;
934 p0_its_peri_b: msi-controller@6c000000 {
936 msi-controller;
937 #msi-cells = <1>;
941 p0_its_dsa_a: msi-controller@c6000000 {
943 msi-controller;
944 #msi-cells = <1>;
948 p0_its_dsa_b: msi-controller@8c6000000
[all...] |
| hip06.dtsi | 245 its_dsa: msi-controller@c6000000 {
247 msi-controller;
248 #msi-cells = <1>;
271 msi-parent = <&its_dsa 0x40080>;
278 msi-parent = <&its_dsa 0x40000>;
285 msi-parent = <&its_dsa 0x40040>;
292 msi-parent = <&its_dsa 0x40085>;
304 msi-parent = <&its_dsa 0x40800>;
311 msi-parent = <&its_dsa 0x40900>;
321 * mappings for PCIe MSI transactions
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/ |
| stingray-fs4.dtsi | 42 msi-parent = <&gic_its 0x4100>;
51 msi-parent = <&gic_its 0x4300>;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
| pci.h | 40 bool msi; member in struct:nvkm_pci
|
