| /src/sys/arch/hppa/hppa/ |
| locore.S | 232 mtctl %t3, CR_FPPADDR
259 mtctl %r0, CR_CCR
302 mtctl %r0, %pcsq
303 mtctl %r0, %pcsq
306 mtctl %t1, %pcoq
308 mtctl %t1, %pcoq
311 mtctl %t2, %ipsw
364 mtctl %r1, %pidr1
365 mtctl %r1, %pidr2
367 mtctl %r0, %pidr
[all...] |
| trap.S | 146 mtctl %r0, %eiem
150 mtctl %t2, %pidr1
229 mtctl %r1, %eiem
400 mtctl %r0, %eiem
421 mtctl %t1, %sar
479 mtctl %t2, %pidr2
484 mtctl %t1, %pidr3
485 mtctl %t2, %pidr4
489 mtctl %t1, CR_TLS
490 mtctl %t2, CR_FPPADD
[all...] |
| intr.c | 314 mtctl(ci->ci_eiem, CR_EIEM);
367 mtctl(eirr, CR_EIRR);
454 mtctl(eiem, CR_EIEM);
475 mtctl(0, CR_EIEM);
|
| fpemu.S | 256 mtctl %r0, %pcsq
258 mtctl %t2, %pcsq
259 mtctl %t2, %pcsq
260 mtctl %r0, %pcoq
262 mtctl %t2, %pcoq
265 mtctl %t2, %pcoq
|
| lock_stubs.S | 244 mtctl %r0, %eiem /* disable interrupts */
277 mtctl %t1, %eiem /* enable interrupts */
|
| fpu.c | 185 mtctl(ccr_enable & (CCR_MASK ^ HPPA_FPUS), CR_CCR);
|
| vm_machdep.c | 271 mtctl(addr, CR_TLS);
|
| machdep.c | 444 mtctl(&cpus[0], CR_CURCPU);
446 mtctl(&lwp0, CR_CURLWP);
720 mtctl(pdc_coproc.ccr_enable & CCR_MASK, CR_CCR);
|
| trap.c | 677 mtctl(frame->tf_eiem, CR_EIEM);
1089 mtctl(frame->tf_eiem, CR_EIEM);
|
| pmap.c | 850 mtctl(addr, CR_VTOP);
1873 mtctl(pmap->pm_pid, CR_PIDR2);
|
| /src/sys/arch/hppa/dev/ |
| clock.c | 75 mtctl(time_inval + cpu_hzticks, CR_ITMR);
99 mtctl(time_inval + cpu_hzticks, CR_ITMR);
|
| /src/sys/arch/hppa/include/ |
| cpufunc.h | 78 #define mtctl(v,r) __asm volatile("mtctl %0,%1":: "r" (v), "i" (r)) macro
|
| cpu.h | 231 #define SET_CURLWP(r,t) mtctl r, CR_CURLWP
|
| /src/sys/lib/libkern/arch/hppa/ |
| bcopy.S | 349 mtctl %t1, %cr11 ! \
457 mtctl %t1, %cr11 ! \
|
