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    Searched refs:mul_u32_u32 (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/selftests/
i915_random.h 51 return upper_32_bits(mul_u32_u32(prandom_u32_state(state), ep_ro));
i915_perf.c 188 delay = div_u64(mul_u32_u32(delay, 1000 * 1000),
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_fixed.h 81 tmp = mul_u32_u32(val, mul.val);
93 tmp = mul_u32_u32(val.val, mul.val);
124 tmp = mul_u32_u32(val, mul.val);
i915_gem.c 287 args->size = mul_u32_u32(args->pitch, args->height);
i915_pmu.c 345 sample->cur += mul_u32_u32(val, mul);
i915_debugfs.c 3504 if (val > mul_u32_u32(U32_MAX, clk))
i915_irq.c 702 scanline = div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
intel_pm.c 681 ret = mul_u32_u32(pixel_rate, cpp * latency);
  /src/sys/external/bsd/drm2/include/linux/
math64.h 86 mul_u32_u32(uint32_t a, uint32_t b) function in typeref:typename:uint64_t
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/
i915_gem_object_blt.c 77 div64_u64(mul_u32_u32(4 * obj->base.size,
157 div64_u64(mul_u32_u32(4 * src->base.size,
  /src/sys/external/bsd/drm2/dist/drm/
drm_rect.c 71 tmp = mul_u32_u32(src, dst - *clip);
drm_dp_mst_topology.c 4520 return DIV_ROUND_UP_ULL(mul_u32_u32(clock * (bpp / 16), 64 * 1006),
4523 return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006),
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_sprite.c 355 return DIV64_U64_ROUND_UP(mul_u32_u32(pixel_rate * num, src_w * src_h),
356 mul_u32_u32(den, dst_w * dst_h));
1226 return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, num * src_w),
1583 return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, 10 * hscale),
intel_color.c 150 result[i] = mul_u32_u32(limited_coeff, abs_coeff) >> 30;
intel_display.c 627 clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m),
1012 m2 = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(target, clock.p * clock.n) << 22,
2558 if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
3122 if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
3124 mul_u32_u32(max_size, tile_size), obj->base.size);
7856 pixel_rate = div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
7976 *ret_m = div_u64(mul_u32_u32(m, *ret_n), n);
11996 return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
intel_dpll_mgr.c 2850 tmp = mul_u32_u32(dco_khz, 47 * 32);
2854 tmp = mul_u32_u32(dco_khz, 1000);
intel_panel.c 480 target_val = mul_u32_u32(source_val - source_min,
intel_dp.c 499 return div_u64(mul_u32_u32(mode_clock, 1000000U),

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