| /src/external/gpl3/gcc/dist/libgcc/config/i386/ |
| crtfastmath.c | 41 unsigned int mxcsr; local
56 unsigned int mxcsr; member in struct:__anon14250
69 mxcsr = fxsave.mxcsr;
72 mxcsr |= MXCSR_DAZ;
75 mxcsr = __builtin_ia32_stmxcsr ();
77 mxcsr |= MXCSR_FTZ;
78 __builtin_ia32_ldmxcsr (mxcsr);
94 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
95 mxcsr |= MXCSR_DAZ | MXCSR_FTZ
[all...] |
| /src/external/gpl3/gcc.old/dist/libgcc/config/i386/ |
| crtfastmath.c | 41 unsigned int mxcsr; local
56 unsigned int mxcsr; member in struct:__anon16664
69 mxcsr = fxsave.mxcsr;
72 mxcsr |= MXCSR_DAZ;
75 mxcsr = __builtin_ia32_stmxcsr ();
77 mxcsr |= MXCSR_FTZ;
78 __builtin_ia32_ldmxcsr (mxcsr);
94 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
95 mxcsr |= MXCSR_DAZ | MXCSR_FTZ
[all...] |
| /src/lib/libm/arch/i387/ |
| fenv.c | 86 /* Load the MXCSR register */
90 /* Store the MXCSR register state */
120 .mxcsr = __INITIAL_MXCSR__ /* MXCSR register */
160 uint32_t mxcsr; local
177 __stmxcsr(&mxcsr);
178 mxcsr &= ~ex;
179 __ldmxcsr(mxcsr);
194 uint32_t mxcsr; local
205 __stmxcsr(&mxcsr);
249 uint32_t mxcsr; local
281 uint32_t mxcsr; local
322 uint32_t mxcsr; local
353 uint32_t mxcsr; local
381 uint32_t mxcsr; local
444 uint32_t mxcsr; local
477 uint32_t mxcsr, omask; local
501 uint32_t mxcsr, omask; local
[all...] |
| /src/lib/libm/arch/x86_64/ |
| fenv.c | 84 /* Load the MXCSR register */
88 /* Store the MXCSR register state */
118 __INITIAL_MXCSR__ /* MXCSR register */
157 __stmxcsr(&fenv.mxcsr);
158 fenv.mxcsr &= ~ex;
159 __ldmxcsr(fenv.mxcsr);
173 uint32_t mxcsr; local
185 /* Store the MXCSR register */
186 __stmxcsr(&mxcsr);
189 *flagp = (x87_status | mxcsr) & ex
262 uint32_t mxcsr; local
282 uint32_t mxcsr; local
310 uint32_t mxcsr; local
382 uint32_t mxcsr; local
456 uint32_t mxcsr; local
496 uint32_t mxcsr, omask; local
519 uint32_t mxcsr, omask; local
[all...] |
| /src/external/gpl3/gcc.old/dist/libphobos/src/std/math/ |
| hardware.d | 156 // OR the result with the SSE2 status register (MXCSR).
159 uint mxcsr;
162 "stmxcsr %0" : "=m" (mxcsr);
164 return (sw | mxcsr) & EXCEPTIONS_MASK;
206 // OR the result with the SSE2 status register (MXCSR).
209 uint mxcsr;
210 asm pure nothrow @nogc { stmxcsr mxcsr; }
211 return (sw | mxcsr) & EXCEPTIONS_MASK;
254 // Also clear exception flags in MXCSR, SSE's control register.
257 uint mxcsr;
[all...] |
| /src/tests/kernel/arch/x86/ |
| sig_fpu.c | 260 uint32_t mxcsr; member in struct:xmmregs
284 * bits for the mxcsr.
287 before.mxcsr = arc4random() & (MXCSR_FTZ | MXCSR_RC | MXCSR_DAZ);
289 before.mxcsr |= __SHIFTIN(exc, MXCSR_EXCMASK);
290 before.mxcsr |= __SHIFTIN(exc, MXCSR_EXCFLAG);
344 [mxcsr_after]"=m"(after.mxcsr)
346 [mxcsr_before]"m"(before.mxcsr),
358 * registers, or the mxcsr, print them and fail.
372 if (before.mxcsr != after.mxcsr) {
[all...] |
| /src/sys/arch/amd64/include/ |
| fenv.h | 42 /* Default values for the mxcsr. All traps masked. */
99 uint32_t mxcsr; /* Control and status register */ member in struct:__anon925
|
| /src/sys/arch/i386/include/ |
| fenv.h | 42 /* Default values for the mxcsr. All traps masked. */
100 uint32_t mxcsr; /* Control and status register */ member in struct:__anon1449
|
| /src/sys/compat/linux/arch/amd64/ |
| linux_machdep.h | 52 u_int32_t mxcsr; member in struct:linux__fpstate
|
| /src/external/gpl3/gdb.old/dist/gdbserver/ |
| i387-fp.cc | 73 unsigned int mxcsr; member in struct:i387_fxsave
223 fp->mxcsr = regcache_raw_get_unsigned_by_name (regcache, "mxcsr");
298 memset (((char *) &fp->mxcsr), 0, 4);
458 collect_register_by_name (regcache, "mxcsr", raw);
459 if (memcmp (raw, &fp->mxcsr, 4) != 0)
464 memcpy (&fp->mxcsr, raw, 4);
611 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
797 supply_register_by_name (regcache, "mxcsr", &default_mxcsr)
[all...] |
| /src/external/gpl3/gdb/dist/gdbserver/ |
| i387-fp.cc | 73 unsigned int mxcsr; member in struct:i387_fxsave
223 fp->mxcsr = regcache_raw_get_unsigned_by_name (regcache, "mxcsr");
298 memset (((char *) &fp->mxcsr), 0, 4);
458 collect_register_by_name (regcache, "mxcsr", raw);
459 if (memcmp (raw, &fp->mxcsr, 4) != 0)
464 memcpy (&fp->mxcsr, raw, 4);
611 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
797 supply_register_by_name (regcache, "mxcsr", &default_mxcsr)
[all...] |
| /src/sys/compat/linux/arch/i386/ |
| linux_machdep.h | 69 uint32_t mxcsr; member in struct:linux_fpstate
|
| /src/sys/arch/x86/x86/ |
| fpu.c | 668 * the mxcsr bits are 'sticky' and need clearing to not confuse a later trap.
695 uint32_t mxcsr; local
696 x86_stmxcsr(&mxcsr);
697 statbits = mxcsr;
699 mxcsr &= ~0x3f;
700 x86_ldmxcsr(&mxcsr);
843 * Invalid bits in mxcsr or mxcsr_mask will cause faults.
1005 * Copy MXCSR if either SSE or AVX state is requested, to match the
1010 * Invalid bits in mxcsr or mxcsr_mask will cause faults.
1158 * Additionally, clear any invalid bits in the mxcsr, lik
[all...] |
| /src/crypto/external/apache2/openssl/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 99 static const u32 mxcsr = 0x7f80; variable
138 asm volatile("ldmxcsr %0" ::"m"(mxcsr));
253 asm volatile("ldmxcsr %0" ::"m"(mxcsr));
|
| /src/crypto/external/bsd/openssl/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 97 static const u32 mxcsr = 0x7f80; variable
136 asm volatile ("ldmxcsr %0"::"m"(mxcsr));
258 asm volatile ("ldmxcsr %0"::"m"(mxcsr));
|
| /src/crypto/external/bsd/openssl.old/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 97 static const u32 mxcsr = 0x7f80; variable
136 asm volatile ("ldmxcsr %0"::"m"(mxcsr));
258 asm volatile ("ldmxcsr %0"::"m"(mxcsr));
|
| /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/stdc/ |
| fenv.d | 245 uint mxcsr; /* Control and status register */
263 uint mxcsr; /* Control and status register */
299 uint mxcsr;
|
| /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/sys/posix/ |
| ucontext.d | 119 uint mxcsr;
1460 uint mxcsr;
1482 uint mxcsr;
|
