/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/cipher/ |
nouveau_nvkm_engine_cipher_g84.c | 42 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, 64 return nvkm_gpuobj_new(object->engine->subdev.device, 256,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
gpuobj.h | 46 int nvkm_gpuobj_new(struct nvkm_device *, u32 size, int align, bool zero,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bar/ |
nouveau_nvkm_subdev_bar_nv50.c | 120 ret = nvkm_gpuobj_new(device, 0x20000, 0, false, NULL, &bar->mem); 124 ret = nvkm_gpuobj_new(device, bar->pgd_addr, 0, false, bar->mem, 129 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, bar->mem, &bar->pgd); 156 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar2); 192 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar1);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
nouveau_nvkm_engine_fifo_chang84.c | 268 ret = nvkm_gpuobj_new(device, 0x0200, 0, true, chan->base.inst, 273 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst, 278 ret = nvkm_gpuobj_new(device, 0x1000, 0x400, true, chan->base.inst, 283 ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->base.inst,
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nouveau_nvkm_engine_fifo_channv50.c | 257 ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, chan->base.inst, 262 ret = nvkm_gpuobj_new(device, 0x1200, 0, true, chan->base.inst, 267 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst,
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nouveau_nvkm_engine_fifo_chan.c | 435 ret = nvkm_gpuobj_new(device, size, align, zero, NULL, &chan->inst);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/dma/ |
nouveau_nvkm_engine_dma_usergf119.c | 52 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
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nouveau_nvkm_engine_dma_usergv100.c | 52 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
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nouveau_nvkm_engine_dma_usergf100.c | 53 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
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nouveau_nvkm_engine_dma_usernv04.c | 67 ret = nvkm_gpuobj_new(device, 16, align, false, parent, pgpuobj);
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nouveau_nvkm_engine_dma_usernv50.c | 53 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/mpeg/ |
nouveau_nvkm_engine_mpeg_nv50.c | 45 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4,
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nouveau_nvkm_engine_mpeg_nv44.c | 61 int ret = nvkm_gpuobj_new(chan->object.engine->subdev.device, 264 * 4,
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nouveau_nvkm_engine_mpeg_nv31.c | 47 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, align,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/core/ |
nouveau_nvkm_core_ramht.c | 162 ret = nvkm_gpuobj_new(ramht->device, size, align, true,
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nouveau_nvkm_core_gpuobj.c | 272 nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero, function in typeref:typename:int
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/ |
nouveau_nvkm_engine_xtensa.c | 52 return nvkm_gpuobj_new(object->engine->subdev.device, 0x10000, align,
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nouveau_nvkm_engine_falcon.c | 54 return nvkm_gpuobj_new(object->engine->subdev.device, 256,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
nouveau_nvkm_engine_gr_nv40.c | 52 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 20, align, 84 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,
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nouveau_nvkm_engine_gr_nv50.c | 51 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, 78 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,
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nouveau_nvkm_engine_gr_nv04.c | 1051 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, align,
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nouveau_nvkm_engine_gr_gf100.c | 334 ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
nouveau_nvkm_engine_disp_nv50.c | 141 ret = nvkm_gpuobj_new(device, 0x10000, 0x10000, false, NULL,
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/src/sys/external/bsd/drm2/dist/drm/nouveau/ |
nouveau_drm.c | 411 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
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