| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| nouveau_nvkm_engine_disp_hdmig84.c | 48 nvkm_mask(device, 0x6165a4 + hoff, 0x40000000, 0x00000000);
49 nvkm_mask(device, 0x61653c + hoff, 0x00000001, 0x00000000);
50 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000);
51 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000000);
56 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000);
63 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000001);
67 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000000);
71 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000001);
74 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010000);
82 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010001)
[all...] |
| nouveau_nvkm_engine_disp_hdmigt215.c | 48 nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
49 nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);
50 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
51 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
56 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
63 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
67 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
71 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
74 nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
82 nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001)
[all...] |
| nouveau_nvkm_engine_disp_hdmigf119.c | 47 nvkm_mask(device, 0x616798 + hoff, 0x40000000, 0x00000000);
48 nvkm_mask(device, 0x616730 + hoff, 0x00000001, 0x00000000);
49 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000000);
50 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000000);
55 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000000);
62 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000001);
66 nvkm_mask(device, 0x616730 + hoff, 0x00010001, 0x00010000);
77 nvkm_mask(device, 0x616730 + hoff, 0x00000001, 0x00000001);
81 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000000);
83 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000001)
[all...] |
| nouveau_nvkm_engine_disp_hdmigk104.c | 48 nvkm_mask(device, 0x616798 + hoff, 0x40000000, 0x00000000);
49 nvkm_mask(device, 0x690100 + hdmi, 0x00000001, 0x00000000);
50 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000);
51 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000);
56 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000);
63 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000001);
67 nvkm_mask(device, 0x690100 + hdmi, 0x00010001, 0x00000000);
73 nvkm_mask(device, 0x690100 + hdmi, 0x00000001, 0x00000001);
78 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000);
80 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000001)
[all...] |
| nouveau_nvkm_engine_disp_hdmigv100.c | 46 nvkm_mask(device, 0x6165c0 + hoff, 0x40000000, 0x00000000);
47 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000000);
48 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
49 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000);
54 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000);
61 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000001);
65 nvkm_mask(device, 0x6f0100 + hdmi, 0x00010001, 0x00000000);
76 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000001);
81 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
83 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001)
[all...] |
| nouveau_nvkm_engine_disp_changf119.c | 36 nvkm_mask(device, 0x610090, 0x00000001 << index, 0x00000000 << index);
46 nvkm_mask(device, 0x610090, 0x00000001 << index, 0x00000001 << index);
62 nvkm_mask(device, 0x610090, mask, 0x00000000);
63 nvkm_mask(device, 0x6100a0, mask, 0x00000000);
65 nvkm_mask(device, 0x6100a0, mask, mask);
|
| nouveau_nvkm_engine_disp_sortu102.c | 38 nvkm_mask(device, 0x61657c + hoff, 0xffffffff, (aligned << 16) | pbn);
39 nvkm_mask(device, 0x616578 + hoff, 0x00003f3f, (slot_nr << 8) | slot);
58 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
62 nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000);
63 nvkm_mask(device, 0x61c10c + loff, 0x00000003, 0x00000001);
65 nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl);
|
| nouveau_nvkm_engine_disp_sorg94.c | 38 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark);
47 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2);
48 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 |
58 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h);
59 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v);
85 nvkm_mask(device, 0x61c10c + loff, 0x0f000000, pattern << 24);
99 nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
100 nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
122 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor);
123 nvkm_mask(device, 0x61c10c + loff, 0x001f4000, dpctrl)
[all...] |
| nouveau_nvkm_engine_disp_hdagt215.c | 42 nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002);
55 nvkm_mask(device, 0x61c448 + ior->id * 0x800, mask, data);
|
| nouveau_nvkm_engine_disp_sorgm107.c | 38 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
40 nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
|
| nouveau_nvkm_engine_disp_hdmigm200.c | 38 nvkm_mask(device, 0x61c5bc + hoff, 0x00000003, ctrl);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/ibus/ |
| nouveau_nvkm_subdev_ibus_gf117.c | 35 nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800);
36 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100);
37 nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff);
|
| nouveau_nvkm_subdev_ibus_gk20a.c | 34 nvkm_mask(device, 0x137250, 0x3f, 0);
36 nvkm_mask(device, 0x000200, 0x20, 0);
38 nvkm_mask(device, 0x000200, 0x20, 0x20);
65 nvkm_mask(device, 0x12004c, 0x2, 0x2);
|
| nouveau_nvkm_subdev_ibus_gk104.c | 39 nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
50 nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
61 nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
104 nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000);
105 nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200);
106 nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800);
107 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100);
108 nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff);
109 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200);
110 nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pmu/ |
| nouveau_nvkm_subdev_pmu_gk104.c | 69 nvkm_mask(device, 0x000200, 0x00001000, 0x00000000);
71 nvkm_mask(device, 0x000200, 0x08000000, 0x08000000);
74 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000002);
75 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
76 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
78 nvkm_mask(device, 0x020004, 0xc0000000, enable ? 0xc0000000 : 0x40000000);
81 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000);
82 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
83 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
85 nvkm_mask(device, 0x000200, 0x08000000, 0x00000000)
[all...] |
| nouveau_nvkm_subdev_pmu_gk110.c | 63 nvkm_mask(device, 0x000200, 0x00001000, 0x00000000);
65 nvkm_mask(device, 0x000200, 0x08000000, 0x08000000);
68 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000002);
69 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
70 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
72 nvkm_mask(device, 0x0206b4, 0x00000000, 0x00000000);
81 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000);
82 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
83 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
85 nvkm_mask(device, 0x000200, 0x08000000, 0x00000000)
[all...] |
| nouveau_nvkm_subdev_pmu_gp102.c | 35 nvkm_mask(device, 0x10a3c0, 0x00000001, 0x00000001);
36 nvkm_mask(device, 0x10a3c0, 0x00000001, 0x00000000);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/i2c/ |
| nouveau_nvkm_subdev_i2c_padg94.c | 42 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000001);
45 nvkm_mask(device, 0x00e500 + base, 0x0000c003, 0x0000c001);
46 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000000);
49 nvkm_mask(device, 0x00e500 + base, 0x0000c003, 0x00000002);
50 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000000);
|
| nouveau_nvkm_subdev_i2c_padgm200.c | 42 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000001);
45 nvkm_mask(device, 0x00d970 + base, 0x0000c003, 0x0000c001);
46 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000000);
49 nvkm_mask(device, 0x00d970 + base, 0x0000c003, 0x00000002);
50 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000000);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_gm200.c | 39 case 16: nvkm_mask(device, 0x100c80, 0x00001801, 0x00001001); break;
40 case 17: nvkm_mask(device, 0x100c80, 0x00001801, 0x00000000); break;
41 case 0: nvkm_mask(device, 0x100c80, 0x00001800, 0x00001800); break;
59 nvkm_mask(device, 0x100cc4, 0x00060000,
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/therm/ |
| nouveau_nvkm_subdev_therm_gt215.c | 53 nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
56 nvkm_mask(device, 0x00e720, 0x001f0000, tach->line << 16);
57 nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
59 nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_nv05.c | 83 nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
94 nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
97 nvkm_mask(device, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
99 nvkm_mask(device, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
100 nvkm_mask(device, NV04_PFB_CFG1, 0, 1);
107 nvkm_mask(device, NV04_PFB_BOOT_0,
116 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
121 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
125 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| nouveau_nvkm_engine_fifo_g84.c | 36 nvkm_mask(device, 0x002140, 0x40000000, 0x00000000);
43 nvkm_mask(device, 0x002140, 0x40000000, 0x40000000);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bus/ |
| nouveau_nvkm_subdev_bus_g94.c | 40 nvkm_mask(device, 0x001098, 0x00000008, 0x00000000);
45 nvkm_mask(device, 0x001098, 0x00000018, 0x00000018);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fuse/ |
| nouveau_nvkm_subdev_fuse_gf100.c | 40 fuse_enable = nvkm_mask(device, 0x022400, 0x800, 0x800);
41 unk = nvkm_mask(device, 0x021000, 0x1, 0x1);
|
