| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/virtual/ |
| amdgpu_virtual_stream_encoder.c | 92 bool odm_combine)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 102 bool odm_combine,
113 if (odm_combine)
707 if (pipe_param.dest.odm_combine) {
1255 if (dst->full_recout_width == 0 && !dst->odm_combine) {
1265 // As of DCN2, mpc_combine and odm_combine are mutually exclusive
1270 dst->odm_combine,
1282 dst->odm_combine,
1309 dst->odm_combine,
1321 dst->odm_combine,
1352 dst->odm_combine,
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 126 bool odm_combine,
137 if (odm_combine)
1203 if (dst->full_recout_width == 0 && !dst->odm_combine) {
1212 // As of DCN2, mpc_combine and odm_combine are mutually exclusive
1216 dst->odm_combine,
1227 dst->odm_combine,
1252 dst->odm_combine,
1263 dst->odm_combine,
1291 dst->odm_combine,
1301 dst->odm_combine,
[all...] |
| amdgpu_display_rq_dlg_calc_20v2.c | 126 bool odm_combine,
137 if (odm_combine)
1204 if (dst->full_recout_width == 0 && !dst->odm_combine) {
1213 // As of DCN2, mpc_combine and odm_combine are mutually exclusive
1217 dst->odm_combine,
1228 dst->odm_combine,
1253 dst->odm_combine,
1264 dst->odm_combine,
1292 dst->odm_combine,
1302 dst->odm_combine,
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| stream_encoder.h | 238 bool odm_combine);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_stream_encoder.c | 534 bool odm_combine)
538 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_COMBINE, odm_combine);
|
| amdgpu_dcn20_resource.c | 1966 pipes[pipe_cnt].pipe.dest.odm_combine = dm_odm_combine_mode_2to1;
1969 pipes[pipe_cnt].pipe.dest.odm_combine = dm_odm_combine_mode_disabled;
2096 pipes[pipe_cnt].pipe.dest.odm_combine = 0;
2680 pipes[pipe_cnt].pipe.dest.odm_combine =
2683 pipes[pipe_cnt].pipe.dest.odm_combine = 0;
2689 pipes[pipe_cnt].pipe.dest.odm_combine =
2692 pipes[pipe_cnt].pipe.dest.odm_combine = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| display_mode_structs.h | 334 unsigned int odm_combine; member in struct:_vcs_dpi_display_pipe_dest_params_st
|
| amdgpu_display_mode_vba.c | 444 dst->odm_combine;
588 if (dst->odm_combine && !src->is_hsplit)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_resource.c | 1071 pipes[pipe_cnt].pipe.dest.odm_combine =
1074 pipes[pipe_cnt].pipe.dest.odm_combine = 0;
1080 pipes[pipe_cnt].pipe.dest.odm_combine =
1083 pipes[pipe_cnt].pipe.dest.odm_combine = 0;
|
