| /src/sys/arch/hppa/spmath/ |
| impys.S | 62 op1: .equ 5 /* multiplicand */ label
74 stws,ma op1,4(%sp) ; save registers on stack
84 ldws 0(%arg0),op1 ; get multiplicand
87 xor op2,op1,sign ; sign(0) = sign of product
88 mpy1: comb,< op1,gr0,mpya ; br. if multiplicand < 0
90 addib,= 0,op1,fini0 ; op1 = 0, product = 0
116 ; ---- bits = 0001 ---- add op1, then shift 4 bits
118 addb,tr op1,pu,sh4n+4 ; add op1 to product, to shif
[all...] |
| impyu.S | 62 op1: .equ 5 ; multiplicand label
81 stws,ma op1,4(%sp) ; save registers on stack
90 ldws 0(%arg0),op1 ; get multiplicand
92 addib,= 0,op1,fini0 ; op1 = 0, product = 0
94 bb,>= op1,0,mpy1 ; test msb of multiplicand
100 extru,= op1,31,31,op1 ; clear msb of multiplicand
101 b mpy1 ; if op1 < 2**32, start multiply
133 ; ---- bits = 0001 ---- add op1, then shift 4 bit
[all...] |
| /src/sys/arch/i386/i386/ |
| db_disasm.c | 111 #define op1(x) (x) macro
135 { "sgdt", false, NONE, op1(E), 0 },
138 { "lidt", false, NONE, op1(E), 0 },
139 { "smsw", false, NONE, op1(E), 0 },
141 { "lmsw", false, NONE, op1(E), 0 },
157 { "fxsave", false, NONE, op1(E), 0 },
158 { "fxrstor", false, NONE, op1(E), 0 },
159 { "ldmxcsr", false, NONE, op1(E), 0 },
160 { "stmxcsr", false, NONE, op1(E), 0 },
161 { "xsave", false, NONE, op1(E), 0 }
[all...] |
| /src/sys/arch/amd64/amd64/ |
| db_disasm.c | 128 #define op1(x) (x) macro
191 { "rdrand",true, LONG, op1(Rv), 0 },
192 { "rdseed",true, LONG, op1(Rv), 0 }
196 /*00*/ { "", true, NONE, op1(Ew), db_Grp6 },
197 /*01*/ { "", true, NONE, op1(Ew), db_Grp7 },
295 /*80*/ { "jo", false, NONE, op1(Dl), 0 },
296 /*81*/ { "jno", false, NONE, op1(Dl), 0 },
297 /*82*/ { "jb", false, NONE, op1(Dl), 0 },
298 /*83*/ { "jnb", false, NONE, op1(Dl), 0 },
299 /*84*/ { "jz", false, NONE, op1(Dl), 0 }
[all...] |
| /src/sys/arch/sh3/include/ |
| sh_opcode.h | 12 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c20308
18 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c20408
24 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c20508
84 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c20f08
90 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c21008
97 unsigned op1: 4; member in struct:__anon0130a2c2010a::__anon0130a2c21108
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_gpu_commands.h | 254 #define MI_MATH_INSTR(opcode, op1, op2) ((opcode) << 20 | (op1) << 10 | (op2))
257 #define MI_MATH_LOAD(op1, op2) MI_MATH_INSTR(0x080, op1, op2)
258 #define MI_MATH_LOADINV(op1, op2) MI_MATH_INSTR(0x480, op1, op2)
259 #define MI_MATH_LOAD0(op1) MI_MATH_INSTR(0x081, op1)
260 #define MI_MATH_LOAD1(op1) MI_MATH_INSTR(0x481, op1)
[all...] |
| /src/usr.sbin/gspa/gspa/ |
| gsp_inst.c | 447 operand op0, op1; local in function:encode_instr
458 op1 = ops->next;
459 if( op1 != NULL && spec[1] == 0 && USES_EXPR(op1) )
460 eval_expr(op1->op_u.value, &val[1], &eline[1]);
462 op1 = NULL;
465 if (class == MOVE && op0 && op1 && op1->type == REG) {
468 if ((op0->reg_no & op1->reg_no & GSPA_REGFILE) == 0) {
470 op1->reg_no ^= GSPA_A0 ^ GSPA_B0
[all...] |
| /src/sys/arch/hppa/hppa/ |
| db_disasm.c | 1877 u_int op1, r1, fmt, t; local in function:floatDasm
1881 op1 = CoprExt1(w);
1883 fmt = (op1 >> 2) & 3; /* get precision of source */
1890 r1 = (op1 >> 11) & 0x3e;
1894 if (op1 & 2) { /* class 2 or 3 */
1898 r2 = (op1 >> 6) & 0x3e;
1902 if ((op1 & 1) == 0) { /* class 2 */
1904 switch((op1 >> 4) & 7) {
1924 switch((op1 >> 4) & 7) {
1934 } else if (op1 & 1) { /* class 1 *
[all...] |
| /src/lib/libnvmm/ |
| libnvmm_x86.c | 2333 * the group. op1 gets overwritten in the Immediate node, if any.
2719 exec_##instr##sz(uint##sz##_t op1, uint##sz##_t op2, uint64_t *rflags) \
2728 : "r" (op1), "r" (op2)); \
2734 exec_##instr(uint64_t op1, uint64_t op2, uint64_t *rflags, size_t opsize) \
2738 return exec_##instr##8(op1, op2, rflags); \
2740 return exec_##instr##16(op1, op2, rflags); \
2742 return exec_##instr##32(op1, op2, rflags); \
2744 return exec_##instr##64(op1, op2, rflags); \
2748 /* SUB: ret = op1 - op2 */
2756 /* OR: ret = op1 | op2 *
2793 uint64_t *op1, op2, fl, ret; variable in typeref:typename:uint64_t *
2825 uint64_t *op1, op2, fl, ret; local in function:x86_func_and
2855 uint64_t *op1, op2; local in function:x86_func_xchg
2879 uint64_t *op1, *op2, fl, ret; local in function:x86_func_sub
2914 uint64_t *op1, op2, fl, ret; local in function:x86_func_xor
2944 uint64_t *op1, *op2, fl; local in function:x86_func_cmp
2967 uint64_t *op1, *op2, fl; local in function:x86_func_test
3238 uint64_t *gprs, op1, op2, fl; local in function:assist_mem_cmps
[all...] |
| /src/sys/arch/aarch64/aarch64/ |
| disasm.c | 215 #define SYSREG_ENC(op0, op1, CRn, CRm, op2) \
216 (((op0)<<19)|((op1)<<16)|((CRn)<<12)|((CRm)<<8)|((op2)<<5))
225 /* op0 op1 CRn CRm op2 name */
616 uint64_t op0, uint64_t op1, uint64_t CRn, uint64_t CRm, uint64_t op2)
621 code = SYSREG_ENC(op0, op1, CRn, CRm, op2);
634 (u_int)op0, (u_int)op1, (u_int)CRn, (u_int)CRm, (u_int)op2);
639 #define RSYSREGNAME(buf, buflen, op0, op1, CRn, CRm, op2) \
640 sysregname(buf, buflen, SYSREG_OP_READ, op0, op1, CRn, CRm, op2)
641 #define WSYSREGNAME(buf, buflen, op0, op1, CRn, CRm, op2) \
642 sysregname(buf, buflen, SYSREG_OP_WRITE, op0, op1, CRn, CRm, op2
[all...] |
| /src/bin/sh/ |
| arithmetic.c | 151 higher_prec(int op1, int op2)
154 return arith_prec(op1) < arith_prec(op2);
|
| /src/sys/external/bsd/sljit/dist/sljit_src/ |
| sljitNativeTILEGX_64.c | 746 static sljit_s32 push_4_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int op1, int op2, int op3, int line)
755 inst_buf[inst_buf_index].operand_value[1] = op1;
758 inst_buf[inst_buf_index].input_registers = 1L << op1;
766 static sljit_s32 push_3_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int op1, int op2, int line)
775 inst_buf[inst_buf_index].operand_value[1] = op1;
781 inst_buf[inst_buf_index].input_registers = (1L << op0) | (1L << op1);
785 inst_buf[inst_buf_index].input_registers = 1L << op1;
786 inst_buf[inst_buf_index].output_registers = (1L << op0) | (1L << op1);
802 inst_buf[inst_buf_index].input_registers = (1L << op1) | (1L << op2);
814 inst_buf[inst_buf_index].input_registers = 1L << op1;
[all...] |
| /src/common/lib/libx86emu/ |
| x86emu.c | 4058 uint8_t op1; local in function:X86EMU_exec_one_byte
4060 op1 = fetch_byte_imm(emu);
4062 switch (op1) {
4856 if (op1 != 0x26 && op1 != 0x2e && op1 != 0x36 && op1 != 0x3e &&
4857 (op1 | 3) != 0x67)
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/ |
| rk3399-gru.dtsi | 10 #include "rk3399-op1-opp.dtsi"
|
