| /src/tests/lib/libc/regex/ |
| debug.c | 95 sop opnd; local
114 opnd = OPND(*s);
121 if (strchr("\\|()^$.[+*?{}!<> ", (char)opnd) != NULL)
122 fprintf(d, "\\%c", (char)opnd);
124 fprintf(d, "%s", regchar((char)opnd));
142 fprintf(d, "[(%u)", opnd);
146 fprintf(d, "(\\<%u>", opnd);
149 fprintf(d, "<%u>\\)", opnd);
153 if (OP(*(s+opnd)) != O_PLUS
[all...] |
| /src/external/gpl3/binutils/dist/opcodes/ |
| aarch64-opc.c | 968 dump_match_qualifiers (const struct aarch64_opnd_info *opnd,
976 curr[i] = opnd[i].qualifier;
1591 /* Check that indexed register operand OPND has a register in the range
1596 check_reglane (const aarch64_opnd_info *opnd,
1601 if (!value_in_range_p (opnd->reglane.regno, min_regno, max_regno))
1607 if (!value_in_range_p (opnd->reglane.index, min_index, max_index))
1616 /* Check that register list operand OPND has NUM_REGS registers and a
1620 check_reglist (const aarch64_opnd_info *opnd,
1624 if (opnd->reglist.num_regs != num_regs)
1629 if (opnd->reglist.stride != stride
1810 const aarch64_opnd_info *opnd = opnds + idx; local
4155 const aarch64_opnd_info *opnd = opnds + idx; local
[all...] |
| aarch64-gen.c | 973 operand *opnd;
976 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
978 opnd->has_inserter = opnd->inserter[0] != '0';
979 opnd->has_extractor = opnd->extractor[0] != '0';
989 operand *opnd;
999 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
972 operand *opnd; local
988 operand *opnd; local
1032 operand *opnd; local
1090 operand *opnd; local
[all...] |
| nfp-dis.c | 936 nfp_me_is_imm_opnd10 (unsigned int opnd)
938 return _BF (opnd, 9, 8) == 0x3;
942 nfp_me_is_imm_opnd8 (unsigned int opnd)
944 return _BTST (opnd, 5);
948 nfp_me_imm_opnd10 (unsigned int opnd)
950 return nfp_me_is_imm_opnd10 (opnd) ? (opnd & 0xff) : ~0U;
954 nfp_me_imm_opnd8 (unsigned int opnd, unsigned int imm8_msb)
956 unsigned int v = (imm8_msb << 7) | _BFS (opnd, 7, 6, 5) | _BF (opnd, 4, 0)
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| aarch64-opc.c | 959 dump_match_qualifiers (const struct aarch64_opnd_info *opnd,
967 curr[i] = opnd[i].qualifier;
1582 /* Check that indexed register operand OPND has a register in the range
1587 check_reglane (const aarch64_opnd_info *opnd,
1592 if (!value_in_range_p (opnd->reglane.regno, min_regno, max_regno))
1598 if (!value_in_range_p (opnd->reglane.index, min_index, max_index))
1607 /* Check that register list operand OPND has NUM_REGS registers and a
1611 check_reglist (const aarch64_opnd_info *opnd,
1615 if (opnd->reglist.num_regs != num_regs)
1620 if (opnd->reglist.stride != stride
1801 const aarch64_opnd_info *opnd = opnds + idx; local
4077 const aarch64_opnd_info *opnd = opnds + idx; local
[all...] |
| aarch64-gen.c | 976 operand *opnd;
979 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
981 opnd->has_inserter = opnd->inserter[0] != '0';
982 opnd->has_extractor = opnd->extractor[0] != '0';
992 operand *opnd;
1002 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
975 operand *opnd; local
991 operand *opnd; local
1036 operand *opnd; local
1093 operand *opnd; local
[all...] |
| nfp-dis.c | 936 nfp_me_is_imm_opnd10 (unsigned int opnd)
938 return _BF (opnd, 9, 8) == 0x3;
942 nfp_me_is_imm_opnd8 (unsigned int opnd)
944 return _BTST (opnd, 5);
948 nfp_me_imm_opnd10 (unsigned int opnd)
950 return nfp_me_is_imm_opnd10 (opnd) ? (opnd & 0xff) : ~0U;
954 nfp_me_imm_opnd8 (unsigned int opnd, unsigned int imm8_msb)
956 unsigned int v = (imm8_msb << 7) | _BFS (opnd, 7, 6, 5) | _BF (opnd, 4, 0)
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| aarch64-opc.c | 959 dump_match_qualifiers (const struct aarch64_opnd_info *opnd,
967 curr[i] = opnd[i].qualifier;
1582 /* Check that indexed register operand OPND has a register in the range
1587 check_reglane (const aarch64_opnd_info *opnd,
1592 if (!value_in_range_p (opnd->reglane.regno, min_regno, max_regno))
1598 if (!value_in_range_p (opnd->reglane.index, min_index, max_index))
1607 /* Check that register list operand OPND has NUM_REGS registers and a
1611 check_reglist (const aarch64_opnd_info *opnd,
1615 if (opnd->reglist.num_regs != num_regs)
1620 if (opnd->reglist.stride != stride
1801 const aarch64_opnd_info *opnd = opnds + idx; local
4090 const aarch64_opnd_info *opnd = opnds + idx; local
[all...] |
| aarch64-gen.c | 973 operand *opnd;
976 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
978 opnd->has_inserter = opnd->inserter[0] != '0';
979 opnd->has_extractor = opnd->extractor[0] != '0';
989 operand *opnd;
999 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
972 operand *opnd; local
988 operand *opnd; local
1032 operand *opnd; local
1090 operand *opnd; local
[all...] |
| nfp-dis.c | 936 nfp_me_is_imm_opnd10 (unsigned int opnd)
938 return _BF (opnd, 9, 8) == 0x3;
942 nfp_me_is_imm_opnd8 (unsigned int opnd)
944 return _BTST (opnd, 5);
948 nfp_me_imm_opnd10 (unsigned int opnd)
950 return nfp_me_is_imm_opnd10 (opnd) ? (opnd & 0xff) : ~0U;
954 nfp_me_imm_opnd8 (unsigned int opnd, unsigned int imm8_msb)
956 unsigned int v = (imm8_msb << 7) | _BFS (opnd, 7, 6, 5) | _BF (opnd, 4, 0)
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| aarch64-opc.c | 956 dump_match_qualifiers (const struct aarch64_opnd_info *opnd,
964 curr[i] = opnd[i].qualifier;
1579 /* Check that indexed register operand OPND has a register in the range
1584 check_reglane (const aarch64_opnd_info *opnd,
1589 if (!value_in_range_p (opnd->reglane.regno, min_regno, max_regno))
1595 if (!value_in_range_p (opnd->reglane.index, min_index, max_index))
1604 /* Check that register list operand OPND has NUM_REGS registers and a
1608 check_reglist (const aarch64_opnd_info *opnd,
1612 if (opnd->reglist.num_regs != num_regs)
1617 if (opnd->reglist.stride != stride
1798 const aarch64_opnd_info *opnd = opnds + idx; local
4068 const aarch64_opnd_info *opnd = opnds + idx; local
[all...] |
| aarch64-gen.c | 976 operand *opnd;
979 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
981 opnd->has_inserter = opnd->inserter[0] != '0';
982 opnd->has_extractor = opnd->extractor[0] != '0';
992 operand *opnd;
1002 for (i = 0, opnd = operands; i < num; ++i, ++opnd)
975 operand *opnd; local
991 operand *opnd; local
1036 operand *opnd; local
1093 operand *opnd; local
[all...] |
| nfp-dis.c | 936 nfp_me_is_imm_opnd10 (unsigned int opnd)
938 return _BF (opnd, 9, 8) == 0x3;
942 nfp_me_is_imm_opnd8 (unsigned int opnd)
944 return _BTST (opnd, 5);
948 nfp_me_imm_opnd10 (unsigned int opnd)
950 return nfp_me_is_imm_opnd10 (opnd) ? (opnd & 0xff) : ~0U;
954 nfp_me_imm_opnd8 (unsigned int opnd, unsigned int imm8_msb)
956 unsigned int v = (imm8_msb << 7) | _BFS (opnd, 7, 6, 5) | _BF (opnd, 4, 0)
[all...] |
| /src/external/gpl3/binutils/dist/include/ |
| xtensa-isa.h | 455 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
472 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
483 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
493 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
498 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
509 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
513 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
524 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
527 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
538 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
[all...] |
| /src/external/gpl3/binutils.old/dist/include/ |
| xtensa-isa.h | 455 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
472 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
483 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
493 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
498 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
509 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
513 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
524 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
527 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
538 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
[all...] |
| /src/external/gpl3/gdb.old/dist/include/ |
| xtensa-isa.h | 455 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
472 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
483 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
493 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
498 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
509 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
513 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
524 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
527 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
538 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
[all...] |
| /src/external/gpl3/gdb/dist/include/ |
| xtensa-isa.h | 455 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
472 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
483 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
493 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
498 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
509 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
513 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
524 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
527 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
538 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
[all...] |
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-aarch64-ginsn.c | 52 /* Get the DWARF register number for the given OPND. If OPND is an address,
53 the returned register is the base register. If OPND spans multiple
57 ginsn_dw2_regnum (aarch64_opnd_info *opnd)
62 opnd_class = aarch64_get_operand_class (opnd->type);
67 dw2reg_num = opnd->reg.regno + 64;
70 dw2reg_num = opnd->reglist.first_regno + 64;
73 dw2reg_num = opnd->addr.base_regno;
79 if (aarch64_zero_register_p (opnd))
84 dw2reg_num = opnd->reg.regno
109 aarch64_opnd_info *dst, *opnd; local
662 aarch64_opnd_info *opnd = NULL; local
732 aarch64_opnd_info *opnd; local
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-aarch64-ginsn.c | 52 /* Get the DWARF register number for the given OPND. If OPND is an address,
53 the returned register is the base register. If OPND spans multiple
57 ginsn_dw2_regnum (aarch64_opnd_info *opnd)
62 opnd_class = aarch64_get_operand_class (opnd->type);
67 dw2reg_num = opnd->reg.regno + 64;
70 dw2reg_num = opnd->reglist.first_regno + 64;
73 dw2reg_num = opnd->addr.base_regno;
79 if (aarch64_zero_register_p (opnd))
84 dw2reg_num = opnd->reg.regno
109 aarch64_opnd_info *dst, *opnd; local
662 aarch64_opnd_info *opnd = NULL; local
732 aarch64_opnd_info *opnd; local
[all...] |
| /src/lib/libcompat/regexp/ |
| regexp.c | 84 /* definition number opnd? meaning */
695 reginsert(op, opnd)
697 char *opnd;
711 while (src > opnd)
714 place = opnd; /* Op node, where operand used to be. */
950 char *opnd; local
952 opnd = OPERAND(scan);
954 if (*opnd != *reginput)
956 len = strlen(opnd);
957 if (len > 1 && strncmp(opnd, reginput
1104 char *opnd; local
[all...] |
| /src/external/bsd/less/dist/ |
| regexp.c | 80 /* definition number opnd? meaning */
628 reginsert(op, opnd)
630 char *opnd;
644 while (src > opnd)
647 place = opnd; /* Op node, where operand used to be. */
872 register char *opnd; local
874 opnd = OPERAND(scan);
876 if (*opnd != *reginput)
878 len = (int) strlen(opnd);
879 if (len > 1 && strncmp(opnd, reginput, len) != 0
1036 register char *opnd; local
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFMIPeephole.cpp | 92 MachineOperand &opnd = CopyMI->getOperand(1); local
94 if (!opnd.isReg())
100 Register Reg = opnd.getReg();
117 MachineOperand &opnd = PhiMI->getOperand(i); local
119 if (!opnd.isReg())
122 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg());
518 MachineOperand &opnd = DefMI->getOperand(i); local
519 if (!opnd.isReg()) {
524 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg());
|
| /src/external/gpl3/binutils/dist/bfd/ |
| xtensa-isa.c | 860 #define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \
862 if ((OPND) < 0 || (OPND) >= (ICLASS)->num_operands) \
866 "opcode \"%s\" has %d operands", (OPND), \
874 get_operand (xtensa_isa_internal *intisa, xtensa_opcode opc, int opnd)
882 CHECK_OPERAND (intisa, opc, iclass, opnd, NULL);
883 operand_id = iclass->operands[opnd].u.operand_id;
889 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd)
894 intop = get_operand (intisa, opc, opnd);
901 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd)
[all...] |
| /src/external/gpl3/binutils.old/dist/bfd/ |
| xtensa-isa.c | 860 #define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \
862 if ((OPND) < 0 || (OPND) >= (ICLASS)->num_operands) \
866 "opcode \"%s\" has %d operands", (OPND), \
874 get_operand (xtensa_isa_internal *intisa, xtensa_opcode opc, int opnd)
882 CHECK_OPERAND (intisa, opc, iclass, opnd, NULL);
883 operand_id = iclass->operands[opnd].u.operand_id;
889 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd)
894 intop = get_operand (intisa, opc, opnd);
901 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd)
[all...] |
| /src/external/gpl3/gdb.old/dist/bfd/ |
| xtensa-isa.c | 860 #define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \
862 if ((OPND) < 0 || (OPND) >= (ICLASS)->num_operands) \
866 "opcode \"%s\" has %d operands", (OPND), \
874 get_operand (xtensa_isa_internal *intisa, xtensa_opcode opc, int opnd)
882 CHECK_OPERAND (intisa, opc, iclass, opnd, NULL);
883 operand_id = iclass->operands[opnd].u.operand_id;
889 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd)
894 intop = get_operand (intisa, opc, opnd);
901 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd)
[all...] |
