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    Searched refs:or_mask (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
soc15.h 44 u32 or_mask; member in struct:soc15_reg_golden
81 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
82 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
amdgpu_soc15.c 441 tmp = entry->or_mask;
445 tmp |= (entry->or_mask & entry->and_mask);
amdgpu_device.c 703 u32 tmp, reg, and_mask, or_mask; local
712 or_mask = registers[i + 2];
715 tmp = or_mask;
720 tmp |= (or_mask & and_mask);
722 tmp |= or_mask;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_combios.c 2897 uint32_t reg, val, and_mask, or_mask; local
2925 or_mask = RBIOS32(index);
2928 val = (val & and_mask) | or_mask;
2979 or_mask = RBIOS32(index);
2982 val = (val & and_mask) | or_mask;
2994 or_mask = RBIOS32(index);
2997 val = (val & and_mask) | or_mask;
3028 uint32_t val, and_mask, or_mask; local
3046 or_mask = RBIOS32(offset);
3050 tmp |= or_mask;
3108 uint32_t and_mask, or_mask; local
3217 uint32_t or_mask = RBIOS16(offset); local
    [all...]
radeon_device.c 212 u32 tmp, reg, and_mask, or_mask; local
221 or_mask = registers[i + 2];
224 tmp = or_mask;
228 tmp |= or_mask;

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