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    Searched refs:otg_inst (Results 1 - 19 of 19) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dm_cp_psp.h 34 uint8_t otg_inst; member in struct:cp_psp_stream_config
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
dwb.h 118 int otg_inst; member in struct:dwbc
hubp.h 158 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dmub_psr.c 159 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst;
161 copy_settings_data->otg_inst = 0;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/
dmub_cmd.h 225 uint8_t otg_inst; member in struct:dmub_cmd_psr_copy_settings_data
  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm_irq.c 630 if (acrtc->otg_inst == -1)
633 irq_source = dal_irq_type + acrtc->otg_inst;
amdgpu_dm_hdcp.c 338 display->controller = CONTROLLER_ID_D0 + config->otg_inst;
amdgpu_dm.c 270 int otg_inst)
276 if (otg_inst == -1) {
284 if (amdgpu_crtc->otg_inst == otg_inst)
4234 irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst;
4263 irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst;
5431 acrtc->otg_inst = -1;
6020 acrtc->otg_inst = -1;
6958 acrtc->otg_inst = status->primary_otg_inst;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
display_mode_structs.h 333 unsigned char otg_inst; member in struct:_vcs_dpi_display_pipe_dest_params_st
amdgpu_display_mode_vba.c 580 OTGInstPlane[mode_lib->vba.NumberOfActivePlanes] = dst->otg_inst;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
dcn20_hubp.h 314 void hubp2_vtg_sel(struct hubp *hubp, uint32_t otg_inst);
amdgpu_dcn20_hubp.c 1035 void hubp2_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
1039 REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
amdgpu_dcn20_hwseq.c 1767 optc = dc->res_pool->timing_generators[dwb->otg_inst];
amdgpu_dcn20_resource.c 1960 pipes[pipe_cnt].pipe.dest.otg_inst = res_ctx->pipe_ctx[i].stream_res.tg->inst;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mode.h 430 int otg_inst; member in struct:amdgpu_crtc
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_stream.c 417 dwb->otg_inst = stream_status->primary_otg_inst;
amdgpu_dc_link.c 2929 config.otg_inst = (uint8_t) pipe_ctx->stream_res.tg->inst;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hubp.c 1221 void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
1225 REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
dcn10_hubp.h 757 void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst);

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