HomeSort by: relevance | last modified time | path
    Searched refs:output_port (Results 1 - 25 of 71) sorted by relevancy

1 2 3

  /src/external/gpl3/gdb/dist/sim/ppc/
basics.h 67 output_port, enumerator in enum:__anon19872
  /src/external/gpl3/gdb.old/dist/sim/ppc/
basics.h 67 output_port, enumerator in enum:__anon22611
  /src/external/gpl3/gdb/dist/sim/bfin/
dv-bfin_wdog.c 149 { "reset", WDEV_RESET, 0, output_port, },
150 { "nmi", WDEV_NMI, 0, output_port, },
151 { "gpi", WDEV_GPI, 0, output_port, },
dv-bfin_uart2.c 209 { "tx", DV_PORT_TX, 0, output_port, },
210 { "rx", DV_PORT_RX, 0, output_port, },
211 { "stat", DV_PORT_STAT, 0, output_port, },
dv-bfin_sic.c 590 { "ivg7", IVG7, 0, output_port, }, \
591 { "ivg8", IVG8, 0, output_port, }, \
592 { "ivg9", IVG9, 0, output_port, }, \
593 { "ivg10", IVG10, 0, output_port, }, \
594 { "ivg11", IVG11, 0, output_port, }, \
595 { "ivg12", IVG12, 0, output_port, }, \
596 { "ivg13", IVG13, 0, output_port, }, \
597 { "ivg14", IVG14, 0, output_port, }, \
598 { "ivg15", IVG15, 0, output_port, },
660 { "sup_irq@0", 0, 0, output_port, },
    [all...]
dv-bfin_uart.c 393 { "tx", DV_PORT_TX, 0, output_port, },
394 { "rx", DV_PORT_RX, 0, output_port, },
395 { "stat", DV_PORT_STAT, 0, output_port, },
dv-bfin_gptimer.c 148 { "stat", 0, 0, output_port, },
dv-bfin_pll.c 132 { "pll", 0, 0, output_port, },
dv-bfin_ppi.c 178 { "stat", 0, 0, output_port, },
dv-bfin_rtc.c 151 { "rtc", 0, 0, output_port, },
dv-bfin_spi.c 179 { "stat", 0, 0, output_port, },
  /src/external/gpl3/gdb.old/dist/sim/bfin/
dv-bfin_wdog.c 149 { "reset", WDEV_RESET, 0, output_port, },
150 { "nmi", WDEV_NMI, 0, output_port, },
151 { "gpi", WDEV_GPI, 0, output_port, },
dv-bfin_uart2.c 209 { "tx", DV_PORT_TX, 0, output_port, },
210 { "rx", DV_PORT_RX, 0, output_port, },
211 { "stat", DV_PORT_STAT, 0, output_port, },
dv-bfin_sic.c 590 { "ivg7", IVG7, 0, output_port, }, \
591 { "ivg8", IVG8, 0, output_port, }, \
592 { "ivg9", IVG9, 0, output_port, }, \
593 { "ivg10", IVG10, 0, output_port, }, \
594 { "ivg11", IVG11, 0, output_port, }, \
595 { "ivg12", IVG12, 0, output_port, }, \
596 { "ivg13", IVG13, 0, output_port, }, \
597 { "ivg14", IVG14, 0, output_port, }, \
598 { "ivg15", IVG15, 0, output_port, },
660 { "sup_irq@0", 0, 0, output_port, },
    [all...]
dv-bfin_uart.c 393 { "tx", DV_PORT_TX, 0, output_port, },
394 { "rx", DV_PORT_RX, 0, output_port, },
395 { "stat", DV_PORT_STAT, 0, output_port, },
dv-bfin_gptimer.c 148 { "stat", 0, 0, output_port, },
  /src/external/gpl3/gdb/dist/sim/common/
sim-basics.h 107 output_port, enumerator in enum:__anon19203
dv-pal.c 204 { "countdown", COUNTDOWN_PORT, 0, output_port, },
205 { "timer", TIMER_PORT, 0, output_port, },
206 { "int", INT_PORT, MAX_NR_PROCESSORS, output_port, },
  /src/external/gpl3/gdb.old/dist/sim/common/
sim-basics.h 107 output_port, enumerator in enum:__anon21942
dv-pal.c 204 { "countdown", COUNTDOWN_PORT, 0, output_port, },
205 { "timer", TIMER_PORT, 0, output_port, },
206 { "int", INT_PORT, MAX_NR_PROCESSORS, output_port, },
  /src/external/gpl3/gdb/dist/sim/mn10300/
dv-mn103tim.c 138 { "timer-0-underflow", TIMER0_UFLOW, 0, output_port, },
139 { "timer-1-underflow", TIMER1_UFLOW, 0, output_port, },
140 { "timer-2-underflow", TIMER2_UFLOW, 0, output_port, },
141 { "timer-3-underflow", TIMER3_UFLOW, 0, output_port, },
142 { "timer-4-underflow", TIMER4_UFLOW, 0, output_port, },
143 { "timer-5-underflow", TIMER5_UFLOW, 0, output_port, },
145 { "timer-6-underflow", TIMER6_UFLOW, 0, output_port, },
146 { "timer-6-compare-a", TIMER6_CMPA, 0, output_port, },
147 { "timer-6-compare-b", TIMER6_CMPB, 0, output_port, },
dv-mn103ser.c 113 { "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
114 { "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
115 { "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
116 { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
117 { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
118 { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
  /src/external/gpl3/gdb.old/dist/sim/mn10300/
dv-mn103tim.c 138 { "timer-0-underflow", TIMER0_UFLOW, 0, output_port, },
139 { "timer-1-underflow", TIMER1_UFLOW, 0, output_port, },
140 { "timer-2-underflow", TIMER2_UFLOW, 0, output_port, },
141 { "timer-3-underflow", TIMER3_UFLOW, 0, output_port, },
142 { "timer-4-underflow", TIMER4_UFLOW, 0, output_port, },
143 { "timer-5-underflow", TIMER5_UFLOW, 0, output_port, },
145 { "timer-6-underflow", TIMER6_UFLOW, 0, output_port, },
146 { "timer-6-compare-a", TIMER6_CMPA, 0, output_port, },
147 { "timer-6-compare-b", TIMER6_CMPB, 0, output_port, },
dv-mn103ser.c 113 { "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
114 { "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
115 { "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
116 { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
117 { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
118 { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
  /src/external/gpl3/gdb/dist/sim/lm32/
dv-lm32timer.c 53 {"int", INT_PORT, 0, output_port},

Completed in 51 milliseconds

1 2 3