| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/ |
| amdgpu_dce120_clk_mgr.c | 96 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce12_update_clocks
100 patched_disp_clk = patched_disp_clk * 115 / 100;
102 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
109 patched_disp_clk = dce_adjust_dp_ref_freq_for_ss(
110 clk_mgr_dce, patched_disp_clk);
111 clock_voltage_req.clocks_in_khz = patched_disp_clk;
112 clk_mgr_base->clks.dispclk_khz = dce112_set_clock(clk_mgr_base, patched_disp_clk);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
| amdgpu_dce112_clk_mgr.c | 204 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce112_update_clocks
208 patched_disp_clk = patched_disp_clk * 115 / 100;
218 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
219 patched_disp_clk = dce112_set_clock(clk_mgr_base, patched_disp_clk);
220 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| dce_clk_mgr.c | 679 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce_update_clocks
683 patched_disp_clk = patched_disp_clk * 115 / 100;
693 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) {
694 patched_disp_clk = dce_set_clock(clk_mgr, patched_disp_clk);
695 clk_mgr->clks.dispclk_khz = patched_disp_clk;
706 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce11_update_clocks
710 patched_disp_clk = patched_disp_clk * 115 / 100
733 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce112_update_clocks
761 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce12_update_clocks
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/ |
| amdgpu_dce110_clk_mgr.c | 259 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce11_update_clocks
263 patched_disp_clk = patched_disp_clk * 115 / 100;
273 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
274 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);
275 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/ |
| amdgpu_dce_clk_mgr.c | 406 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; local in function:dce_update_clocks
410 patched_disp_clk = patched_disp_clk * 115 / 100;
420 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
421 patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk);
422 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
