HomeSort by: relevance | last modified time | path
    Searched refs:pci (Results 1 - 25 of 1218) sorted by relevancy

1 2 3 4 5 6 7 8 91011>>

  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pci/
nouveau_nvkm_subdev_pci_base.c 33 #include <core/pci.h>
37 nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr)
39 return pci->func->rd32(pci, addr);
43 nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data)
45 pci->func->wr08(pci, addr, data);
49 nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
51 pci->func->wr32(pci, addr, data)
76 struct nvkm_pci *pci = arg; local
96 struct nvkm_pci *pci = nvkm_pci(subdev); local
107 struct nvkm_pci *pci = nvkm_pci(subdev); local
116 struct nvkm_pci *pci = nvkm_pci(subdev); local
186 struct nvkm_pci *pci = nvkm_pci(subdev); local
212 struct nvkm_pci *pci = nvkm_pci(subdev); local
256 struct nvkm_pci *pci; local
    [all...]
agp.h 16 static inline void nvkm_agp_ctor(struct nvkm_pci *pci) {}
17 static inline void nvkm_agp_dtor(struct nvkm_pci *pci) {}
18 static inline void nvkm_agp_preinit(struct nvkm_pci *pci) {}
19 static inline int nvkm_agp_init(struct nvkm_pci *pci) { return -ENOSYS; }
20 static inline void nvkm_agp_fini(struct nvkm_pci *pci) {}
nouveau_nvkm_subdev_pci_agp.c 43 /* SiS 761 does not support AGP cards, use PCI mode */
49 nvkm_agp_fini(struct nvkm_pci *pci)
51 if (pci->agp.acquired) {
52 agp_backend_release(pci->agp.bridge);
53 pci->agp.acquired = false;
61 nvkm_agp_preinit(struct nvkm_pci *pci)
63 struct nvkm_device *device = pci->subdev.device;
64 u32 mode = nvkm_pci_rd32(pci, 0x004c);
71 if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) {
72 mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW
    [all...]
nouveau_nvkm_subdev_pci_pcie.c 56 nvkm_pcie_get_version(struct nvkm_pci *pci)
58 if (!pci->func->pcie.version)
61 return pci->func->pcie.version(pci);
65 nvkm_pcie_get_max_version(struct nvkm_pci *pci)
67 if (!pci->func->pcie.version_supported)
70 return pci->func->pcie.version_supported(pci);
74 nvkm_pcie_set_version(struct nvkm_pci *pci, int version)
76 if (!pci->func->pcie.set_version
    [all...]
nouveau_nvkm_subdev_pci_g84.c 31 #include <core/pci.h>
34 g84_pcie_version_supported(struct nvkm_pci *pci)
41 g84_pcie_version(struct nvkm_pci *pci)
43 struct nvkm_device *device = pci->subdev.device;
48 g84_pcie_set_version(struct nvkm_pci *pci, u8 ver)
50 struct nvkm_device *device = pci->subdev.device;
55 g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
57 struct nvkm_device *device = pci->subdev.device;
62 g84_pcie_cur_speed(struct nvkm_pci *pci)
64 u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000
    [all...]
nouveau_nvkm_subdev_pci_gk104.c 32 gk104_pcie_version_supported(struct nvkm_pci *pci)
34 return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1;
38 gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
40 struct nvkm_device *device = pci->subdev.device;
44 gf100_pcie_set_cap_speed(pci, false);
48 gf100_pcie_set_cap_speed(pci, true);
52 gf100_pcie_set_cap_speed(pci, true);
59 gk104_pcie_cap_speed(struct nvkm_pci *pci)
61 int speed = gf100_pcie_cap_speed(pci);
67 int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30000
    [all...]
nouveau_nvkm_subdev_pci_nv40.c 32 nv40_pci_rd32(struct nvkm_pci *pci, u16 addr)
34 struct nvkm_device *device = pci->subdev.device;
39 nv40_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data)
41 struct nvkm_device *device = pci->subdev.device;
46 nv40_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
48 struct nvkm_device *device = pci->subdev.device;
53 nv40_pci_msi_rearm(struct nvkm_pci *pci)
55 nvkm_pci_wr08(pci, 0x0068, 0xff);
nouveau_nvkm_subdev_pci_gf100.c 32 gf100_pci_msi_rearm(struct nvkm_pci *pci)
34 nvkm_pci_wr08(pci, 0x0704, 0xff);
38 gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver)
40 struct nvkm_device *device = pci->subdev.device;
45 gf100_pcie_version(struct nvkm_pci *pci)
47 struct nvkm_device *device = pci->subdev.device;
52 gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
54 struct nvkm_device *device = pci->subdev.device;
59 gf100_pcie_cap_speed(struct nvkm_pci *pci)
61 struct nvkm_device *device = pci->subdev.device
    [all...]
nouveau_nvkm_subdev_pci_nv04.c 32 nv04_pci_rd32(struct nvkm_pci *pci, u16 addr)
34 struct nvkm_device *device = pci->subdev.device;
39 nv04_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data)
41 struct nvkm_device *device = pci->subdev.device;
46 nv04_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
48 struct nvkm_device *device = pci->subdev.device;
  /src/sys/dev/pci/
pci_verbose.c 30 * PCI autoconfiguration support functions.
44 #include <pci.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pcidevs.h>
50 #include <dev/pci/pci_verbose.h>
51 #include <dev/pci/pcidevs_data.h>
53 DEV_VERBOSE_MODULE_DEFINE(pci, "pci")
wsdisplay_pci.c 36 #include <dev/pci/pcivar.h>
38 #include <dev/pci/wsdisplay_pci.h>
46 KASSERT(device_is_a(device_parent(self), "pci"));
48 busid->ubus.pci.domain = device_unit(device_parent(self));
50 &busid->ubus.pci.bus, &busid->ubus.pci.device,
51 &busid->ubus.pci.function);
  /src/lib/libpci/
Makefile 5 LIB= pci
10 .PATH.c: ${SYSDIR}/dev/pci ${SYSDIR}/dev
15 MAN= pci.3
17 MLINKS= pci.3 pcibus_conf_read.3 \
18 pci.3 pcibus_conf_write.3 \
19 pci.3 pcidev_conf_read.3 \
20 pci.3 pcidev_conf_write.3 \
21 pci.3 pci_findvendor.3 \
22 pci.3 pci_devinfo.3 \
23 pci.3 pci_conf_print.
    [all...]
  /src/sys/arch/arm/gemini/
gemini_pcivar.h 6 #include <dev/pci/pcivar.h>
  /src/sys/arch/evbarm/hdl_g/
hdlgvar.h 41 #include <dev/pci/pcivar.h>
  /src/sys/arch/evbarm/ixdp425/
ixdp425var.h 32 #include <dev/pci/pcivar.h>
  /src/sys/arch/evbarm/ixm1200/
ixm1200var.h 32 #include <dev/pci/pcivar.h>
  /src/sys/arch/alpha/pci/
agp_machdep.c 47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/agpvar.h>
50 #include <dev/pci/agpreg.h>
pciide_machdep.c 34 * PCI IDE controller driver (Alpha machine-dependent portion).
37 * sys/dev/pci/ppb.c, revision 1.16).
39 * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" from the
40 * PCI SIG.
51 #include <dev/pci/pcireg.h>
52 #include <dev/pci/pcivar.h>
53 #include <dev/pci/pciidereg.h>
54 #include <dev/pci/pciidevar.h>
  /src/sys/arch/evbarm/iq80321/
iq80321var.h 41 #include <dev/pci/pcivar.h>
  /src/sys/arch/evbarm/iyonix/
iyonixvar.h 6 #include <dev/pci/pcivar.h>
  /src/sys/arch/hpcmips/vr/
vrc4173bcuvar.h 29 #include <dev/pci/pcivar.h>
  /src/sys/arch/iyonix/iyonix/
iyonixvar.h 6 #include <dev/pci/pcivar.h>
  /src/sys/arch/macppc/pci/
agp_machdep.c 39 #include <dev/pci/pcivar.h>
40 #include <dev/pci/pcireg.h>
41 #include <dev/pci/agpvar.h>
42 #include <dev/pci/agpreg.h>
  /src/sys/arch/x86/pci/
agp_machdep.c 12 #include <dev/pci/pcivar.h>
13 #include <dev/pci/pcireg.h>
14 #include <dev/pci/agpvar.h>
15 #include <dev/pci/agpreg.h>
  /src/sys/arch/evbmips/alchemy/
pciide_machdep.c 34 * PCI IDE controller driver (alchemy machine-dependent portion).
37 * sys/dev/pci/ppb.c, revision 1.16).
39 * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" from the
40 * PCI SIG.
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pciidereg.h>
53 #include <dev/pci/pciidevar.h>

Completed in 791 milliseconds

1 2 3 4 5 6 7 8 91011>>