| /src/sys/dev/pci/igc/ |
| igc_phy.c | 471 uint16_t phy_ctrl; local in function:igc_copper_link_autoneg
498 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
502 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
503 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/ |
| sun50i-h6.dtsi | 689 reg-names = "phy_ctrl",
|
| sun50i-a64.dtsi | 577 reg-names = "phy_ctrl",
|
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/allwinner/ |
| sunxi-d1s-t113.dtsi | 561 reg-names = "phy_ctrl",
|
| /src/sys/dev/ic/ |
| bwi.c | 9625 uint16_t phy_ctrl; local in function:bwi_encap
9737 phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,
9740 phy_ctrl |= BWI_TXH_PHY_C_OFDM;
9742 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE;
9751 hdr->txh_phy_ctrl = htole16(phy_ctrl);
|
| /src/sys/dev/pci/ |
| if_wm.c | 16640 uint32_t phy_ctrl; local in function:wm_suspend_workarounds_ich8lan
16643 phy_ctrl = CSR_READ(sc, WMREG_PHY_CTRL);
16644 phy_ctrl |= PHY_CTRL_GBE_DIS;
16684 phy_ctrl &= ~(PHY_CTRL_D0A_LPLU |
16715 CSR_WRITE(sc, WMREG_PHY_CTRL, phy_ctrl);
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| am33xx-l4.dtsi | 331 reg-names = "phy_ctrl", "wakeup";
|
