| /src/sys/arch/powerpc/ibm4xx/dev/ |
| gpio_opb.c | 127 const uint32_t pin_mask = 1 << GPIO_PIN_SHIFT(i + 1); local in function:gpio_opb_attach
135 (reg_odr & pin_mask)
137 : ((reg_tcr & pin_mask)
140 pin->pin_state = (reg_ir & pin_mask) != 0;
173 const uint32_t pin_mask = 1 << GPIO_PIN_SHIFT(p); local in function:gpio_opb_pin_write
176 gpio_clear(sc, GPIO_OR, pin_mask);
178 gpio_set(sc, GPIO_OR, pin_mask);
187 const uint32_t pin_mask = 1 << GPIO_PIN_SHIFT(p); local in function:gpio_opb_pin_ctl
191 gpio_clear(sc, GPIO_ODR, pin_mask);
194 gpio_set(sc, GPIO_TCR, pin_mask);
[all...] |
| /src/sys/arch/arm/ti/ |
| ti_gpio.c | 268 const uint32_t pin_mask = __BIT(pin); local in function:ti_gpio_intr_disable
274 WR4(sc, GPIO_IRQENABLE1, val & ~pin_mask);
276 WR4(sc, GPIO_IRQENABLE1_CLR, pin_mask);
319 const uint32_t pin_mask = __BIT(pin); local in function:ti_gpio_intr_establish
324 val |= pin_mask;
326 val &= ~pin_mask;
331 val |= pin_mask;
333 val &= ~pin_mask;
338 val |= pin_mask;
340 val &= ~pin_mask;
467 const uint32_t pin_mask = __BIT(pin); local in function:ti_gpio_gp_intr_establish
579 const uint32_t pin_mask = __BIT(pin); local in function:ti_gpio_intr
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_hotplug.h | 25 u32 pin_mask, u32 long_mask);
|
| intel_tc.c | 81 u32 pin_mask; local in function:intel_tc_port_get_pin_assignment_mask
83 pin_mask = intel_uncore_read(uncore,
86 WARN_ON(pin_mask == 0xffffffff);
88 return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx)) >>
|
| intel_hotplug.c | 441 * @pin_mask: a mask of hpd pins that have triggered the irq
447 * triggered (@pin_mask), and which of those pins may be long pulses
455 u32 pin_mask, u32 long_mask)
464 if (!pin_mask)
481 if (!(BIT(pin) & pin_mask))
507 if (!(BIT(pin) & pin_mask))
|
| /src/sys/dev/i2c/ |
| emcfan.c | 1959 uint8_t pin_mask; local in function:emcfan_current_gpio_flags
1984 pin_mask = 1 << pin;
1989 if ((mux_reg & pin_mask) == 0)
2013 if (dir_reg & pin_mask) {
2019 if (out_config & pin_mask) {
2036 uint8_t pin_mask; local in function:emcfan_gpio_pin_read
2042 pin_mask = 1 << pin;
2043 if (input_reg & pin_mask)
2059 uint8_t pin_mask; local in function:emcfan_gpio_pin_write
2065 pin_mask = 1 << pin
2086 uint8_t pin_mask = 1 << pin; local in function:emcfan_gpio_pin_ctl
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_irq.c | 1160 u32 *pin_mask, u32 *long_mask,
1167 BUILD_BUG_ON(BITS_PER_TYPE(*pin_mask) < HPD_NUM_PINS);
1173 *pin_mask |= BIT(pin);
1180 hotplug_trigger, dig_hotplug_reg, *pin_mask, *long_mask);
1495 u32 pin_mask = 0, long_mask = 0; local in function:i9xx_hpd_irq_handler
1502 intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
1507 intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
1516 intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
1520 intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
1694 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0 local in function:ibx_hpd_irq_handler
1847 u32 pin_mask = 0, long_mask = 0; local in function:icp_irq_handler
1911 u32 pin_mask = 0, long_mask = 0; local in function:spt_irq_handler
1946 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; local in function:ilk_hpd_irq_handler
2124 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; local in function:bxt_hpd_irq_handler
2138 u32 pin_mask = 0, long_mask = 0; local in function:gen11_hpd_irq_handler
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_tvnv17.c | 135 get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask)
141 *pin_mask = device->quirk->tv_pin_mask;
156 bool reliable = get_tv_detect_quirks(dev, &tv_enc->pin_mask);
164 tv_enc->pin_mask =
167 tv_enc->pin_mask =
171 switch (tv_enc->pin_mask) {
809 tv_enc->pin_mask = 0;
|
| tvnv17.h | 85 uint32_t pin_mask; member in struct:nv17_tv_encoder
|
| nouveau_dispnv04_tvmodesnv17.c | 492 if (tv_enc->pin_mask & 0x4)
494 else if (tv_enc->pin_mask & 0x2)
|
