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    Searched refs:pl1 (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/compiler_rt/dist/lib/tsan/rtl/
tsan_fd.cc 77 atomic_uintptr_t *pl1 = &fdctx.tab[fd / kTableSizeL2]; local in function:__tsan::fddesc
78 uptr l1 = atomic_load(pl1, memory_order_consume);
85 if (atomic_compare_exchange_strong(pl1, &l1, (uptr)p, memory_order_acq_rel))
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
tegra210-p2571.dts 615 pl1 {
616 nvidia,pins = "pl1";
tegra210-p2595.dtsi 601 pl1 {
602 nvidia,pins = "pl1";
tegra210-p2597.dtsi 628 pl1 {
629 nvidia,pins = "pl1";
tegra210-p2894.dtsi 631 pl1 {
632 nvidia,pins = "pl1";
tegra210-smaug.dts 633 pl1 {
634 nvidia,pins = "pl1";
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c 4196 static inline bool smu7_are_power_levels_equal(const struct smu7_performance_level *pl1,
4199 return ((pl1->memory_clock == pl2->memory_clock) &&
4200 (pl1->engine_clock == pl2->engine_clock) &&
4201 (pl1->pcie_gen == pl2->pcie_gen) &&
4202 (pl1->pcie_lane == pl2->pcie_lane));
amdgpu_vega10_hwmgr.c 4706 const struct vega10_performance_level *pl1,
4709 return ((pl1->soc_clock == pl2->soc_clock) &&
4710 (pl1->gfx_clock == pl2->gfx_clock) &&
4711 (pl1->mem_clock == pl2->mem_clock));

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