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  /src/external/gpl3/gdb/dist/sim/ppc/
cpu.c 48 /* the system this processor is contained within */
85 cpu *processor = ZALLOC(cpu); local
88 processor->physical = memory;
89 processor->virtual = vm_create(memory);
90 processor->instruction_map = vm_create_instruction_map(processor->virtual);
91 processor->data_map = vm_create_data_map(processor->virtual);
94 processor->model_ptr = model_create (processor);
260 cpu *processor = (cpu*)data; local
    [all...]
cpu.h 62 (cpu *processor); variable
68 (cpu *processor) CONST_ATTRIBUTE;
72 (cpu *processor) CONST_ATTRIBUTE;
76 (cpu *processor); variable
80 (cpu *processor) CONST_ATTRIBUTE;
89 the case of a single processor) */
93 (cpu *processor,
98 (cpu *processor); variable
102 (cpu *processor,
107 (cpu *processor,
124 (cpu *processor); variable
133 (cpu *processor); variable
153 (cpu *processor); variable
170 (cpu *processor); variable
174 (cpu *processor); variable
183 (cpu *processor); variable
190 (cpu *processor); variable
203 (cpu *processor); variable
    [all...]
interrupts.c 92 and forcing a restart of the processor */
96 perform_oea_interrupt(cpu *processor,
108 cpu_error(processor, cia,
121 cpu_synchronize_context(processor, cia);
128 machine_check_interrupt(cpu *processor,
135 cpu_error(processor, cia, "machine-check interrupt");
140 cia = perform_oea_interrupt(processor, cia, 0x00200, 0, 0, 0, 0);
141 cpu_restart(processor, cia);
152 data_storage_interrupt(cpu *processor,
196 cia = perform_oea_interrupt(processor, cia, 0x00300, 0, 0, 0, 0)
445 cpu *processor = (cpu*)data; local
    [all...]
interrupts.h 49 functions are called out side of the normal processor execution
72 (cpu *processor,
80 (cpu *processor,
86 (cpu *processor,
102 (cpu *processor,
108 (cpu *processor,
113 (cpu *processor,
118 (cpu *processor,
123 (cpu *processor,
133 changed, the processor must call the check_masked_interrupts(
158 (cpu *processor); variable
162 (cpu *processor); variable
    [all...]
emul_generic.c 35 cpu *processor,
39 cpu_nr(processor) + 1,
49 cpu *processor,
52 int status = cpu_registers(processor)->gpr[3];
53 int error = cpu_registers(processor)->gpr[0];
62 emul_read_gpr64(cpu *processor,
68 hi = cpu_registers(processor)->gpr[g];
69 lo = cpu_registers(processor)->gpr[g+1];
72 lo = cpu_registers(processor)->gpr[g];
73 hi = cpu_registers(processor)->gpr[g+1]
174 processor, cia); local
190 processor, cia); local
    [all...]
vm_n.h 37 cpu *processor,
41 unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
47 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
55 alignment_interrupt(processor, cia, ea);
60 if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
62 cpu_error(processor, cia, "misaligned %zu byte read to 0x%lx failed",
68 unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
69 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
87 cpu *processor,
    [all...]
emul_netbsd.c 134 cpu *processor,
163 emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
171 cpu *processor,
190 emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
198 cpu *processor,
203 emul_write_buffer(&t, addr, sizeof(t), processor, cia);
210 cpu *processor,
215 emul_write_buffer(&tz, addr, sizeof(tz), processor, cia);
224 cpu *processor,
237 emul_write_buffer(out, addr, in->d_reclen, processor, cia)
    [all...]
os_emul.h 42 (cpu *processor,
55 (cpu *processor,
hw_register.c 31 register - dummy device to initialize processor registers
37 specify the initial value of various processor registers. The
40 specific processor's register (eg 0.pc).
64 would override the initial value of processor zero's program
71 all program counters to 0xfff00cf0; set processor zero's program
84 int processor; local
89 processor = -1;
94 processor = strtoul(name, &end, 0);
97 DTRACE(register, ("%d.%s=0x%lx\n", processor, name,
100 if (psim_write_register(system, processor, /* all processors *
    [all...]
emul_generic.h 58 (cpu *processor,
62 (cpu *processor,
87 cpu *processor,
110 cpu *processor,
115 (cpu *processor,
119 (cpu *processor,
124 (cpu *processor,
129 (cpu *processor,
138 cpu *processor,
143 cpu *processor,
    [all...]
idecode_fields.h 34 #define is_64bit_mode IS_64BIT_MODE(processor)
42 #define RESERVE cpu_reservation(processor)->valid
43 #define RESERVE_ADDR cpu_reservation(processor)->addr
44 #define RESERVE_DATA cpu_reservation(processor)->data
46 #define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \
49 processor, \
77 #define TB cpu_get_time_base(processor)
idecode_branch.h 34 ppc_spr new_address = (ppc_spr)IEA_MASKED(ppc_is_64bit(processor), \
52 nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
56 nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
  /src/external/gpl3/gdb.old/dist/sim/ppc/
cpu.c 48 /* the system this processor is contained within */
85 cpu *processor = ZALLOC(cpu); local
88 processor->physical = memory;
89 processor->virtual = vm_create(memory);
90 processor->instruction_map = vm_create_instruction_map(processor->virtual);
91 processor->data_map = vm_create_data_map(processor->virtual);
94 processor->model_ptr = model_create (processor);
260 cpu *processor = (cpu*)data; local
    [all...]
cpu.h 62 (cpu *processor); variable
68 (cpu *processor) CONST_ATTRIBUTE;
72 (cpu *processor) CONST_ATTRIBUTE;
76 (cpu *processor); variable
80 (cpu *processor) CONST_ATTRIBUTE;
89 the case of a single processor) */
93 (cpu *processor,
98 (cpu *processor); variable
102 (cpu *processor,
107 (cpu *processor,
124 (cpu *processor); variable
133 (cpu *processor); variable
153 (cpu *processor); variable
170 (cpu *processor); variable
174 (cpu *processor); variable
183 (cpu *processor); variable
190 (cpu *processor); variable
203 (cpu *processor); variable
    [all...]
interrupts.c 92 and forcing a restart of the processor */
96 perform_oea_interrupt(cpu *processor,
108 cpu_error(processor, cia,
121 cpu_synchronize_context(processor, cia);
128 machine_check_interrupt(cpu *processor,
135 cpu_error(processor, cia, "machine-check interrupt");
140 cia = perform_oea_interrupt(processor, cia, 0x00200, 0, 0, 0, 0);
141 cpu_restart(processor, cia);
152 data_storage_interrupt(cpu *processor,
196 cia = perform_oea_interrupt(processor, cia, 0x00300, 0, 0, 0, 0)
445 cpu *processor = (cpu*)data; local
    [all...]
interrupts.h 49 functions are called out side of the normal processor execution
72 (cpu *processor,
80 (cpu *processor,
86 (cpu *processor,
102 (cpu *processor,
108 (cpu *processor,
113 (cpu *processor,
118 (cpu *processor,
123 (cpu *processor,
133 changed, the processor must call the check_masked_interrupts(
158 (cpu *processor); variable
162 (cpu *processor); variable
    [all...]
emul_generic.c 35 cpu *processor,
39 cpu_nr(processor) + 1,
49 cpu *processor,
52 int status = cpu_registers(processor)->gpr[3];
53 int error = cpu_registers(processor)->gpr[0];
62 emul_read_gpr64(cpu *processor,
68 hi = cpu_registers(processor)->gpr[g];
69 lo = cpu_registers(processor)->gpr[g+1];
72 lo = cpu_registers(processor)->gpr[g];
73 hi = cpu_registers(processor)->gpr[g+1]
174 processor, cia); local
190 processor, cia); local
    [all...]
vm_n.h 37 cpu *processor,
41 unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
47 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
55 alignment_interrupt(processor, cia, ea);
60 if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
62 cpu_error(processor, cia, "misaligned %zu byte read to 0x%lx failed",
68 unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
69 mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
87 cpu *processor,
    [all...]
emul_netbsd.c 134 cpu *processor,
163 emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
171 cpu *processor,
190 emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
198 cpu *processor,
203 emul_write_buffer(&t, addr, sizeof(t), processor, cia);
210 cpu *processor,
215 emul_write_buffer(&tz, addr, sizeof(tz), processor, cia);
224 cpu *processor,
237 emul_write_buffer(out, addr, in->d_reclen, processor, cia)
    [all...]
os_emul.h 42 (cpu *processor,
55 (cpu *processor,
hw_register.c 31 register - dummy device to initialize processor registers
37 specify the initial value of various processor registers. The
40 specific processor's register (eg 0.pc).
64 would override the initial value of processor zero's program
71 all program counters to 0xfff00cf0; set processor zero's program
84 int processor; local
89 processor = -1;
94 processor = strtoul(name, &end, 0);
97 DTRACE(register, ("%d.%s=0x%lx\n", processor, name,
100 if (psim_write_register(system, processor, /* all processors *
    [all...]
emul_generic.h 58 (cpu *processor,
62 (cpu *processor,
87 cpu *processor,
110 cpu *processor,
115 (cpu *processor,
119 (cpu *processor,
124 (cpu *processor,
129 (cpu *processor,
138 cpu *processor,
143 cpu *processor,
    [all...]
idecode_fields.h 34 #define is_64bit_mode IS_64BIT_MODE(processor)
42 #define RESERVE cpu_reservation(processor)->valid
43 #define RESERVE_ADDR cpu_reservation(processor)->addr
44 #define RESERVE_DATA cpu_reservation(processor)->data
46 #define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \
49 processor, \
77 #define TB cpu_get_time_base(processor)
idecode_branch.h 34 ppc_spr new_address = (ppc_spr)IEA_MASKED(ppc_is_64bit(processor), \
52 nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
56 nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
  /src/external/mit/expat/dist/xmlwf/
filemap.h 49 void (*processor)(const void *, size_t, const wchar_t *, void *arg),
53 void (*processor)(const void *, size_t, const char *, void *arg),

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